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module 01 ex01 ok

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hugogogo
2025-03-05 19:18:31 +01:00
parent 1e02176100
commit 98e40d5bb8
1 changed files with 10 additions and 14 deletions
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24
module01/ex01/main.c
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@@ -51,25 +51,21 @@
int main() {
MODE_OUTPUT(B, D2);
TCCR1B |= (1 << WGM12); // set timer in CTC (Clear Time on Compare) mode
// -> Table 16-4 : use bit WGM12 to set mode ctc
// -> 16.11.2 : bit WGM12 is located in register TCCR1B
TCCR1B |= (1 << WGM12); // set timer in CTC (Clear Time on Compare) mode
// -> Table 16-4 : use bit WGM12 to set mode ctc
// -> 16.11.2 : bit WGM12 is located in register TCCR1B
OCR1A = TIME_MS(500); // set CTC compare value
// -> Table 16-4 : the value to reset the timer is the Output Compare Registers OCR1A
TCCR1A |= (1 << COM1A0 ) ; // Enable timer 1 Compare Output channel A in toggle mode
// -> Table 14-3 : alternate functions for PORTB1 is OC1A (Timer/Counter1 Output Compare Match A Output)
// -> 14.3.1 : OC1A/PCINT1 – Port B, Bit 1
OCR1A = TIME_MS(500); // set CTC compare value
// -> Table 16-4 : the value to reset the timer is the Output Compare Registers OCR1A
TCCR1B |= (PRESCALE_SET);
while(1) {
if (TIFR1 & (1 << OCF1A)) { // when comparison has occured, bit OCF1A is set
// -> 16.2.1 : "The compare match event will also set the Compare Match Flag (OCF1A/B) which can be used to generate an Output Compare interrupt request"
// -> 16.11.9 : bit OCF1A is in register TIFR1
TOGGLE_LED(D2); // toggle using PINx register
TIFR1 = (1 << OCF1A); // clear the CTC flag
// -> 16.11.9 : "OCF1A can be cleared by writing a logic one to its bit location"
}
continue;
}
}