headers and comments for module02
This commit is contained in:
hugo LAMY
5
.vscode/settings.json
vendored
5
.vscode/settings.json
vendored
@@ -2,6 +2,9 @@
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"files.associations": {
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"io.h": "c",
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"delay.h": "c",
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"interrupt.h": "c"
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"interrupt.h": "c",
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"timer.h": "c",
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"usart.h": "c",
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"utils.h": "c"
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}
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}
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@@ -14,8 +14,14 @@
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#define ARG_2(v1, v2) v2
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#define GET_PORT(args) ARG_1 args
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#define GET_BIT(args) ARG_2 args
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// // version with "LED1 B, D1" without parenthesis
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// #define ARG_1(v1, ...) v1
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// #define ARG_2(v1, v2, ...) v2
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// #define GET_PORT(...) ARG_1(__VA_ARGS__)
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// #define GET_BIT(...) ARG_2(__VA_ARGS__)
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// Actions on elements
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// #define SET_ELEM(...) SET(CONCAT(PORT, GET_PORT(__VA_ARGS__)), GET_BIT(__VA_ARGS__)) // version for "LED1 B, D1" without parenthesis
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#define SET_ELEM(elem) SET(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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#define CLEAR_ELEM(elem) CLEAR(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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#define TEST_ELEM(elem) TEST(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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@@ -2,63 +2,8 @@
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#include <util/delay.h>
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#include <avr/interrupt.h>
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// mathematics
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#define DIV_ROUND_CLOSEST(n, d) ((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d)))
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// stringify
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#define STRINGIFY_HELPER(x) #x
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#define STRINGIFY(x) STRINGIFY_HELPER(x)
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// concatenate
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#define CONCAT_HELPER(x, y) x ## y
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#define CONCAT(x, y) CONCAT_HELPER(x, y)
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// get argument
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#define ARG_1(v1, v2) v1
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#define ARG_2(v1, v2) v2
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#define GET_PORT(args) ARG_1 args
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#define GET_BIT(args) ARG_2 args
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// // version with "LED1 B, D1" without parenthesis
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// #define ARG_1(v1, ...) v1
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// #define ARG_2(v1, v2, ...) v2
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// #define GET_PORT(...) ARG_1(__VA_ARGS__)
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// #define GET_BIT(...) ARG_2(__VA_ARGS__)
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// actions on registers
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#define SET(register, bit) register |= 1 << bit
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#define CLEAR(register, bit) register &= ~(1 << bit)
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#define TEST(register, bit) (register & 1 << bit)
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#define TOGGLE(register, bit) register ^= 1 << bit
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// actions on elements
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#define SET_ELEM(elem) SET(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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// #define SET_ELEM(...) SET(CONCAT(PORT, GET_PORT(__VA_ARGS__)), GET_BIT(__VA_ARGS__)) // version for "LED1 B, D1" without parenthesis
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#define CLEAR_ELEM(elem) CLEAR(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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#define TEST_ELEM(elem) TEST(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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#define TOGGLE_ELEM(elem) TOGGLE(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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#define MODE_OUTPUT(elem) SET(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
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#define MODE_INPUT(elem) CLEAR(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
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#define TOGGLE_PIN(elem) SET(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem))
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#define TEST_PIN(elem) (TEST(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem)))
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#define IS_PIN_SET(elem) (TEST_PIN(elem) == 0)
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#define IS_PIN_CLEAR(elem) (TEST_PIN(elem) == 1)
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// bits
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#define D1 0
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#define D2 1
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#define D3 2
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#define D4 4
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#define SW1 2
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#define SW2 4
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// elements (port, bit)
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// #define LED1 B, D1
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#define LED1 (B, D1)
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#define LED2 (B, D2)
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#define LED3 (B, D3)
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#define LED4 (B, D4)
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#define BUTTON1 (D, SW1)
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#define BUTTON2 (D, SW2)
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#include "utils.h"
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#include "bitmanip.h"
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// USART
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// Table 20-1 : Baud Rate Calculation
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@@ -104,7 +49,7 @@ void uart_tx(char c) {
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UDR0 = (unsigned char) c; // 20.11.1 : Put data into buffer, UDRn – USART I/O Data Register (read and write)
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}
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// write Z on serial port, at a !Hz frequency
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// write Z on serial port, at a 1Hz frequency
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// `screen /dev/ttyUSB0 115200`
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int main() {
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uart_init();
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@@ -1,15 +0,0 @@
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#ifndef TIMER_H
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#define TIMER_H
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#define PRESCALE_VALUE 1024 // can be 1, 8, 64, 256, 1024
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// table 16-5 : prescale sets
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#define PRESCALE_SET(value) \
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((value) == 1 ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
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(value) == 8 ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
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(value) == 64 ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
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(value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
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(value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
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(0<<CS12 | 0<<CS11 | 0<<CS10))
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#define TIME_MS(ms) (((F_CPU / PRESCALE_VALUE) * ms) / 1000)
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#endif // TIMER_H
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@@ -11,5 +11,6 @@
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// mathematics
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#define PERCENT(percent, total) (((float)percent / 100) * total)
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#define DIV_ROUND_CLOSEST(n, d) ((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d)))
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#endif // UTILS_H
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53
module02/ex01/bitmanip.h
Normal file
53
module02/ex01/bitmanip.h
Normal file
@@ -0,0 +1,53 @@
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#ifndef BITMANIP_H
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#define BITMANIP_H
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#include "utils.h"
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// Bit operations on registers
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#define SET(register, bit) (register |= (1 << (bit)))
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#define CLEAR(register, bit) (register &= ~(1 << (bit)))
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#define TEST(register, bit) (register & (1 << (bit)))
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#define TOGGLE(register, bit) (register ^= (1 << (bit)))
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// Get arguments from tuple-like definitions
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#define ARG_1(v1, v2) v1
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#define ARG_2(v1, v2) v2
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#define GET_PORT(args) ARG_1 args
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#define GET_BIT(args) ARG_2 args
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// // version with "LED1 B, D1" without parenthesis
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// #define ARG_1(v1, ...) v1
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// #define ARG_2(v1, v2, ...) v2
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// #define GET_PORT(...) ARG_1(__VA_ARGS__)
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// #define GET_BIT(...) ARG_2(__VA_ARGS__)
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// Actions on elements
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// #define SET_ELEM(...) SET(CONCAT(PORT, GET_PORT(__VA_ARGS__)), GET_BIT(__VA_ARGS__)) // version for "LED1 B, D1" without parenthesis
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#define SET_ELEM(elem) SET(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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#define CLEAR_ELEM(elem) CLEAR(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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#define TEST_ELEM(elem) TEST(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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#define TOGGLE_ELEM(elem) TOGGLE(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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#define MODE_OUTPUT(elem) SET(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
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#define MODE_INPUT(elem) CLEAR(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
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#define TOGGLE_PIN(elem) SET(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem))
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#define TEST_PIN(elem) (TEST(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem)))
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#define IS_PIN_SET(elem) (TEST_PIN(elem) == 0)
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#define IS_PIN_CLEAR(elem) (TEST_PIN(elem) == 1)
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// Bit definitions
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#define D1 0
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#define D2 1
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#define D3 2
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#define D4 4
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#define SW1 2
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#define SW2 4
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// Elements (port, bit)
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#define LED1 (B, D1)
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#define LED2 (B, D2)
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#define LED3 (B, D3)
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#define LED4 (B, D4)
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#define BUTTON1 (D, SW1)
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#define BUTTON2 (D, SW2)
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#endif // BITMANIP_H
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8
module02/ex01/interrupt.h
Normal file
8
module02/ex01/interrupt.h
Normal file
@@ -0,0 +1,8 @@
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#ifndef INTERRUPT_H
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#define INTERRUPT_H
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// 7.3.1 : SREG – AVR Status Register
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#define ENABLE_GLOBAL_INTERRUPT (1<<7)
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#define DISABLE_GLOBAL_INTERRUPT (0<<7)
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#endif // INTERRUPT_H
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@@ -2,120 +2,24 @@
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#include <util/delay.h>
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#include <avr/interrupt.h>
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// mathematics
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#define DIV_ROUND_CLOSEST(n, d) ((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d))) // https://stackoverflow.com/a/18067292
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// stringify
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#define STRINGIFY_HELPER(x) #x
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#define STRINGIFY(x) STRINGIFY_HELPER(x)
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// concatenate
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#define CONCAT_HELPER(x, y) x ## y
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#define CONCAT(x, y) CONCAT_HELPER(x, y)
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// get argument
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#define ARG_1(v1, v2) v1
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#define ARG_2(v1, v2) v2
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#define GET_PORT(args) ARG_1 args
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#define GET_BIT(args) ARG_2 args
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// // version with "LED1 B, D1" without parenthesis
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// #define ARG_1(v1, ...) v1
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// #define ARG_2(v1, v2, ...) v2
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// #define GET_PORT(...) ARG_1(__VA_ARGS__)
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// #define GET_BIT(...) ARG_2(__VA_ARGS__)
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// actions on registers
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#define SET(register, bit) register |= 1 << bit
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#define CLEAR(register, bit) register &= ~(1 << bit)
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#define TEST(register, bit) (register & 1 << bit)
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#define TOGGLE(register, bit) register ^= 1 << bit
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// actions on elements
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#define SET_ELEM(elem) SET(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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// #define SET_ELEM(...) SET(CONCAT(PORT, GET_PORT(__VA_ARGS__)), GET_BIT(__VA_ARGS__)) // version for "LED1 B, D1" without parenthesis
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#define CLEAR_ELEM(elem) CLEAR(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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#define TEST_ELEM(elem) TEST(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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#define TOGGLE_ELEM(elem) TOGGLE(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
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#define MODE_OUTPUT(elem) SET(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
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#define MODE_INPUT(elem) CLEAR(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
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#define TOGGLE_PIN(elem) SET(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem))
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#define TEST_PIN(elem) (TEST(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem)))
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#define IS_PIN_SET(elem) (TEST_PIN(elem) == 0)
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#define IS_PIN_CLEAR(elem) (TEST_PIN(elem) == 1)
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// bits
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#define D1 0
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#define D2 1
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#define D3 2
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#define D4 4
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#define SW1 2
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#define SW2 4
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// elements (port, bit)
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// #define LED1 B, D1
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#define LED1 (B, D1)
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#define LED2 (B, D2)
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#define LED3 (B, D3)
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#define LED4 (B, D4)
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#define BUTTON1 (D, SW1)
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#define BUTTON2 (D, SW2)
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// USART
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// Table 20-1 : Baud Rate Calculation
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#define USART_BAUDRATE 115200
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#define BAUD_PRESCALER (DIV_ROUND_CLOSEST(F_CPU, (16 * USART_BAUDRATE)) - 1)
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// Table 20-8 : Mode Selection (USART Mode SELect)
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#define ASYNCHRONOUS (0<<UMSEL01 | 0<<UMSEL00)
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#define SYNCHRONOUS (0<<UMSEL01 | 1<<UMSEL00)
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// Table 20-9 : Parity Bit Selection (USART Parity Mode)
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#define PARITY_DISABLED (0<<UPM01 | 0<<UPM00)
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#define PARITY_EVEN (1<<UPM01 | 0<<UPM00)
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#define PARITY_ODD (1<<UPM01 | 1<<UPM00)
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// Table 20-10 : Stop Bit Selection (USART Stop Bit Select)
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#define STOP_ONE_BIT (0<<USBS0)
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#define STOP_TWO_BIT (1<<USBS0)
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// Table 20-11 : Data Bit Selection (USART Character SiZe)
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#define DATA_FIVE_BIT (0<<UCSZ02 | 0<<UCSZ01 | 0<<UCSZ00)
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#define DATA_SIX_BIT (0<<UCSZ02 | 0<<UCSZ01 | 1<<UCSZ00)
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#define DATA_SEVEN_BIT (0<<UCSZ02 | 1<<UCSZ01 | 0<<UCSZ00)
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#define DATA_EIGHT_BIT (0<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
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#define DATA_NINE_BIT (1<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
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// 20.11.3 : USART Control and Status Register B (UCSRnB)
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#define RECEIVER_DISABLED (0<<RXEN0)
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#define RECEIVER_ENABLED (1<<RXEN0)
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#define TRANSMITTER_DISABLED (0<<TXEN0)
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#define TRANSMITTER_ENABLED (1<<TXEN0)
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#include "utils.h"
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#include "bitmanip.h"
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#include "timer.h"
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#include "usart.h"
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#include "interrupt.h"
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// TIMER
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#define PERIOD 2000
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#define TIME_MS(ms) (((F_CPU / PRESCALE_VALUE) * ms) / 1000)
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#define PRESCALE_VALUE 1024 // can be 1, 8, 64, 256, 1024
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// table 16-5 : prescale sets
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#define PRESCALE_SET(value) \
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((value) == 1 ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
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(value) == 8 ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
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(value) == 64 ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
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(value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
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(value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
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(0<<CS12 | 0<<CS11 | 0<<CS10))
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// Table 16-4 : Waveform Generation Mode Bit Description
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#define CTC_TOP_OCR1A_IN_TCCR1B (0<<WGM13 | 1<<WGM12)
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#define CTC_TOP_OCR1A_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
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#define CTC_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
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#define CTC_TOP_ICR1_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
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#define FAST_PWM_TOP_OCR1A_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
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#define FAST_PWM_TOP_OCR1A_IN_TCCR1A (1<<WGM11 | 1<<WGM10)
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#define FAST_PWM_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
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#define FAST_PWM_TOP_ICR1_IN_TCCR1A (1<<WGM11 | 0<<WGM10)
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// 16.11.8 : Timer/Counter1 Interrupt Mask Register
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#define INTERRUPT_ENABLE_CHANNEL_A (1 << OCIE1A)
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#define INTERRUPT_DISABLE_CHANNEL_A (0 << OCIE1A)
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// USART
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#define USART_BAUDRATE 115200 // Table 20-1 : Baud Rate Calculation
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// END MACROS
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void uart_init() {
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UBRR0H = (unsigned char) (BAUD_PRESCALER >> 8); // 20.11.5 : UBRRnL and UBRRnH – USART Baud Rate Registers
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UBRR0L = (unsigned char) BAUD_PRESCALER;
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UBRR0H = (unsigned char) (BAUD_PRESCALER(USART_BAUDRATE) >> 8); // 20.11.5 : UBRRnL and UBRRnH – USART Baud Rate Registers
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UBRR0L = (unsigned char) BAUD_PRESCALER(USART_BAUDRATE);
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UCSR0C |= ASYNCHRONOUS | PARITY_DISABLED | STOP_ONE_BIT | DATA_EIGHT_BIT; // 20.11.4 : set Frame Format
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@@ -142,10 +46,11 @@ int main() {
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TCCR1A |= CTC_TOP_OCR1A_IN_TCCR1A; // Table 16-4 : set timer in CTC (Clear Time on Compare) mode
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TCCR1B |= CTC_TOP_OCR1A_IN_TCCR1B;
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sei(); // enable global interrupts (https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html#gaad5ebd34cb344c26ac87594f79b06b73)
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SREG |= ENABLE_GLOBAL_INTERRUPT; // 7.3.1 : Status Register, bit 7 : I – Global Interrupt Enable
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TIMSK1 |= INTERRUPT_ENABLE_CHANNEL_A; // 16.11.8 : enables the Timer1 Compare Match A interrupt, this makes the MCU react when OCR1A == TCNT1 by calling TIMER1_COMPA_vect
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OCR1A = TIME_MS(PERIOD); // Table 16-4 : set CTC compare value on channel A, the counter is cleared to zero when the counter value (TCNT1) matches the OCR1A register
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OCR1A = TIME_MS(PERIOD, PRESCALE_VALUE); // Table 16-4 : set CTC compare value on channel A, the counter is cleared to zero when the counter value (TCNT1) matches the OCR1A register
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TCCR1B |= (PRESCALE_SET(PRESCALE_VALUE)); // 16.4 : set timer according to prescale value, in register TCCR1B, table 16-5 : prescale sets
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27
module02/ex01/timer.h
Normal file
27
module02/ex01/timer.h
Normal file
@@ -0,0 +1,27 @@
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#ifndef TIMER_H
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#define TIMER_H
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// table 16-5 : prescale sets
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#define PRESCALE_SET(value) \
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((value) == 1 ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
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(value) == 8 ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
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(value) == 64 ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
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(value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
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(value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
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(0<<CS12 | 0<<CS11 | 0<<CS10))
|
||||
#define TIME_MS(ms, prescale_value) (((F_CPU / prescale_value) * ms) / 1000)
|
||||
|
||||
// Table 16-4 : Waveform Generation Mode Bit Description
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1B (0<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1A (1<<WGM11 | 1<<WGM10)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1A (1<<WGM11 | 0<<WGM10)
|
||||
// 16.11.8 : Timer/Counter1 Interrupt Mask Register
|
||||
#define INTERRUPT_ENABLE_CHANNEL_A (1 << OCIE1A)
|
||||
#define INTERRUPT_DISABLE_CHANNEL_A (0 << OCIE1A)
|
||||
|
||||
#endif // TIMER_H
|
||||
27
module02/ex01/usart.h
Normal file
27
module02/ex01/usart.h
Normal file
@@ -0,0 +1,27 @@
|
||||
#ifndef USART_H
|
||||
#define USART_H
|
||||
|
||||
#define BAUD_PRESCALER(usart_baudrate) (DIV_ROUND_CLOSEST(F_CPU, (16 * usart_baudrate)) - 1)
|
||||
// Table 20-8 : Mode Selection (USART Mode SELect)
|
||||
#define ASYNCHRONOUS (0<<UMSEL01 | 0<<UMSEL00)
|
||||
#define SYNCHRONOUS (0<<UMSEL01 | 1<<UMSEL00)
|
||||
// Table 20-9 : Parity Bit Selection (USART Parity Mode)
|
||||
#define PARITY_DISABLED (0<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_EVEN (1<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_ODD (1<<UPM01 | 1<<UPM00)
|
||||
// Table 20-10 : Stop Bit Selection (USART Stop Bit Select)
|
||||
#define STOP_ONE_BIT (0<<USBS0)
|
||||
#define STOP_TWO_BIT (1<<USBS0)
|
||||
// Table 20-11 : Data Bit Selection (USART Character SiZe)
|
||||
#define DATA_FIVE_BIT (0<<UCSZ02 | 0<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_SIX_BIT (0<<UCSZ02 | 0<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_SEVEN_BIT (0<<UCSZ02 | 1<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_EIGHT_BIT (0<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_NINE_BIT (1<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
// 20.11.3 : USART Control and Status Register B (UCSRnB)
|
||||
#define RECEIVER_DISABLED (0<<RXEN0)
|
||||
#define RECEIVER_ENABLED (1<<RXEN0)
|
||||
#define TRANSMITTER_DISABLED (0<<TXEN0)
|
||||
#define TRANSMITTER_ENABLED (1<<TXEN0)
|
||||
|
||||
#endif // USART_H
|
||||
16
module02/ex01/utils.h
Normal file
16
module02/ex01/utils.h
Normal file
@@ -0,0 +1,16 @@
|
||||
#ifndef UTILS_H
|
||||
#define UTILS_H
|
||||
|
||||
// stringify
|
||||
#define STRINGIFY_HELPER(x) #x
|
||||
#define STRINGIFY(x) STRINGIFY_HELPER(x)
|
||||
|
||||
// concatenate
|
||||
#define CONCAT_HELPER(x, y) x ## y
|
||||
#define CONCAT(x, y) CONCAT_HELPER(x, y)
|
||||
|
||||
// mathematics
|
||||
#define PERCENT(percent, total) (((float)percent / 100) * total)
|
||||
#define DIV_ROUND_CLOSEST(n, d) ((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d)))
|
||||
|
||||
#endif // UTILS_H
|
||||
53
module02/ex02/bitmanip.h
Normal file
53
module02/ex02/bitmanip.h
Normal file
@@ -0,0 +1,53 @@
|
||||
#ifndef BITMANIP_H
|
||||
#define BITMANIP_H
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
// Bit operations on registers
|
||||
#define SET(register, bit) (register |= (1 << (bit)))
|
||||
#define CLEAR(register, bit) (register &= ~(1 << (bit)))
|
||||
#define TEST(register, bit) (register & (1 << (bit)))
|
||||
#define TOGGLE(register, bit) (register ^= (1 << (bit)))
|
||||
|
||||
// Get arguments from tuple-like definitions
|
||||
#define ARG_1(v1, v2) v1
|
||||
#define ARG_2(v1, v2) v2
|
||||
#define GET_PORT(args) ARG_1 args
|
||||
#define GET_BIT(args) ARG_2 args
|
||||
// // version with "LED1 B, D1" without parenthesis
|
||||
// #define ARG_1(v1, ...) v1
|
||||
// #define ARG_2(v1, v2, ...) v2
|
||||
// #define GET_PORT(...) ARG_1(__VA_ARGS__)
|
||||
// #define GET_BIT(...) ARG_2(__VA_ARGS__)
|
||||
|
||||
// Actions on elements
|
||||
// #define SET_ELEM(...) SET(CONCAT(PORT, GET_PORT(__VA_ARGS__)), GET_BIT(__VA_ARGS__)) // version for "LED1 B, D1" without parenthesis
|
||||
#define SET_ELEM(elem) SET(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define CLEAR_ELEM(elem) CLEAR(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TEST_ELEM(elem) TEST(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TOGGLE_ELEM(elem) TOGGLE(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
|
||||
#define MODE_OUTPUT(elem) SET(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define MODE_INPUT(elem) CLEAR(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TOGGLE_PIN(elem) SET(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TEST_PIN(elem) (TEST(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem)))
|
||||
#define IS_PIN_SET(elem) (TEST_PIN(elem) == 0)
|
||||
#define IS_PIN_CLEAR(elem) (TEST_PIN(elem) == 1)
|
||||
|
||||
// Bit definitions
|
||||
#define D1 0
|
||||
#define D2 1
|
||||
#define D3 2
|
||||
#define D4 4
|
||||
#define SW1 2
|
||||
#define SW2 4
|
||||
|
||||
// Elements (port, bit)
|
||||
#define LED1 (B, D1)
|
||||
#define LED2 (B, D2)
|
||||
#define LED3 (B, D3)
|
||||
#define LED4 (B, D4)
|
||||
#define BUTTON1 (D, SW1)
|
||||
#define BUTTON2 (D, SW2)
|
||||
|
||||
#endif // BITMANIP_H
|
||||
8
module02/ex02/interrupt.h
Normal file
8
module02/ex02/interrupt.h
Normal file
@@ -0,0 +1,8 @@
|
||||
#ifndef INTERRUPT_H
|
||||
#define INTERRUPT_H
|
||||
|
||||
// 7.3.1 : SREG – AVR Status Register
|
||||
#define ENABLE_GLOBAL_INTERRUPT (1<<7)
|
||||
#define DISABLE_GLOBAL_INTERRUPT (0<<7)
|
||||
|
||||
#endif // INTERRUPT_H
|
||||
@@ -2,120 +2,18 @@
|
||||
#include <util/delay.h>
|
||||
#include <avr/interrupt.h>
|
||||
|
||||
// mathematics
|
||||
#define DIV_ROUND_CLOSEST(n, d) ((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d))) // https://stackoverflow.com/a/18067292
|
||||
|
||||
// stringify
|
||||
#define STRINGIFY_HELPER(x) #x
|
||||
#define STRINGIFY(x) STRINGIFY_HELPER(x)
|
||||
|
||||
// concatenate
|
||||
#define CONCAT_HELPER(x, y) x ## y
|
||||
#define CONCAT(x, y) CONCAT_HELPER(x, y)
|
||||
|
||||
// get argument
|
||||
#define ARG_1(v1, v2) v1
|
||||
#define ARG_2(v1, v2) v2
|
||||
#define GET_PORT(args) ARG_1 args
|
||||
#define GET_BIT(args) ARG_2 args
|
||||
// // version with "LED1 B, D1" without parenthesis
|
||||
// #define ARG_1(v1, ...) v1
|
||||
// #define ARG_2(v1, v2, ...) v2
|
||||
// #define GET_PORT(...) ARG_1(__VA_ARGS__)
|
||||
// #define GET_BIT(...) ARG_2(__VA_ARGS__)
|
||||
|
||||
// actions on registers
|
||||
#define SET(register, bit) register |= 1 << bit
|
||||
#define CLEAR(register, bit) register &= ~(1 << bit)
|
||||
#define TEST(register, bit) (register & 1 << bit)
|
||||
#define TOGGLE(register, bit) register ^= 1 << bit
|
||||
|
||||
// actions on elements
|
||||
#define SET_ELEM(elem) SET(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
// #define SET_ELEM(...) SET(CONCAT(PORT, GET_PORT(__VA_ARGS__)), GET_BIT(__VA_ARGS__)) // version for "LED1 B, D1" without parenthesis
|
||||
#define CLEAR_ELEM(elem) CLEAR(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TEST_ELEM(elem) TEST(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TOGGLE_ELEM(elem) TOGGLE(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define MODE_OUTPUT(elem) SET(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define MODE_INPUT(elem) CLEAR(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TOGGLE_PIN(elem) SET(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TEST_PIN(elem) (TEST(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem)))
|
||||
#define IS_PIN_SET(elem) (TEST_PIN(elem) == 0)
|
||||
#define IS_PIN_CLEAR(elem) (TEST_PIN(elem) == 1)
|
||||
|
||||
// bits
|
||||
#define D1 0
|
||||
#define D2 1
|
||||
#define D3 2
|
||||
#define D4 4
|
||||
#define SW1 2
|
||||
#define SW2 4
|
||||
|
||||
// elements (port, bit)
|
||||
// #define LED1 B, D1
|
||||
#define LED1 (B, D1)
|
||||
#define LED2 (B, D2)
|
||||
#define LED3 (B, D3)
|
||||
#define LED4 (B, D4)
|
||||
#define BUTTON1 (D, SW1)
|
||||
#define BUTTON2 (D, SW2)
|
||||
#include "utils.h"
|
||||
#include "bitmanip.h"
|
||||
#include "usart.h"
|
||||
|
||||
// USART
|
||||
// Table 20-1 : Baud Rate Calculation
|
||||
#define USART_BAUDRATE 115200
|
||||
#define BAUD_PRESCALER (DIV_ROUND_CLOSEST(F_CPU, (16 * USART_BAUDRATE)) - 1)
|
||||
// Table 20-8 : Mode Selection (USART Mode SELect)
|
||||
#define ASYNCHRONOUS (0<<UMSEL01 | 0<<UMSEL00)
|
||||
#define SYNCHRONOUS (0<<UMSEL01 | 1<<UMSEL00)
|
||||
// Table 20-9 : Parity Bit Selection (USART Parity Mode)
|
||||
#define PARITY_DISABLED (0<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_EVEN (1<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_ODD (1<<UPM01 | 1<<UPM00)
|
||||
// Table 20-10 : Stop Bit Selection (USART Stop Bit Select)
|
||||
#define STOP_ONE_BIT (0<<USBS0)
|
||||
#define STOP_TWO_BIT (1<<USBS0)
|
||||
// Table 20-11 : Data Bit Selection (USART Character SiZe)
|
||||
#define DATA_FIVE_BIT (0<<UCSZ02 | 0<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_SIX_BIT (0<<UCSZ02 | 0<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_SEVEN_BIT (0<<UCSZ02 | 1<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_EIGHT_BIT (0<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_NINE_BIT (1<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
// 20.11.3 : USART Control and Status Register B (UCSRnB)
|
||||
#define RECEIVER_DISABLED (0<<RXEN0)
|
||||
#define RECEIVER_ENABLED (1<<RXEN0)
|
||||
#define TRANSMITTER_DISABLED (0<<TXEN0)
|
||||
#define TRANSMITTER_ENABLED (1<<TXEN0)
|
||||
|
||||
// TIMER
|
||||
#define PERIOD 2000
|
||||
#define TIME_MS(ms) (((F_CPU / PRESCALE_VALUE) * ms) / 1000)
|
||||
#define PRESCALE_VALUE 1024 // can be 1, 8, 64, 256, 1024
|
||||
// table 16-5 : prescale sets
|
||||
#define PRESCALE_SET(value) \
|
||||
((value) == 1 ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
|
||||
(value) == 8 ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
|
||||
(value) == 64 ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
|
||||
(value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
|
||||
(value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
|
||||
(0<<CS12 | 0<<CS11 | 0<<CS10))
|
||||
// Table 16-4 : Waveform Generation Mode Bit Description
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1B (0<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1A (1<<WGM11 | 1<<WGM10)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1A (1<<WGM11 | 0<<WGM10)
|
||||
// 16.11.8 : Timer/Counter1 Interrupt Mask Register
|
||||
#define INTERRUPT_ENABLE_CHANNEL_A (1 << OCIE1A)
|
||||
#define INTERRUPT_DISABLE_CHANNEL_A (0 << OCIE1A)
|
||||
#define USART_BAUDRATE 115200
|
||||
|
||||
// END MACROS
|
||||
|
||||
void uart_init() {
|
||||
UBRR0H = (unsigned char) (BAUD_PRESCALER >> 8); // 20.11.5 : UBRRnL and UBRRnH – USART Baud Rate Registers
|
||||
UBRR0L = (unsigned char) BAUD_PRESCALER;
|
||||
UBRR0H = (unsigned char) (BAUD_PRESCALER(USART_BAUDRATE) >> 8); // 20.11.5 : UBRRnL and UBRRnH – USART Baud Rate Registers
|
||||
UBRR0L = (unsigned char) BAUD_PRESCALER(USART_BAUDRATE);
|
||||
|
||||
UCSR0C |= ASYNCHRONOUS | PARITY_DISABLED | STOP_ONE_BIT | DATA_EIGHT_BIT; // 20.11.4 : set Frame Format
|
||||
|
||||
|
||||
27
module02/ex02/timer.h
Normal file
27
module02/ex02/timer.h
Normal file
@@ -0,0 +1,27 @@
|
||||
#ifndef TIMER_H
|
||||
#define TIMER_H
|
||||
|
||||
// table 16-5 : prescale sets
|
||||
#define PRESCALE_SET(value) \
|
||||
((value) == 1 ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
|
||||
(value) == 8 ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
|
||||
(value) == 64 ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
|
||||
(value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
|
||||
(value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
|
||||
(0<<CS12 | 0<<CS11 | 0<<CS10))
|
||||
#define TIME_MS(ms, prescale_value) (((F_CPU / prescale_value) * ms) / 1000)
|
||||
|
||||
// Table 16-4 : Waveform Generation Mode Bit Description
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1B (0<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1A (1<<WGM11 | 1<<WGM10)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1A (1<<WGM11 | 0<<WGM10)
|
||||
// 16.11.8 : Timer/Counter1 Interrupt Mask Register
|
||||
#define INTERRUPT_ENABLE_CHANNEL_A (1 << OCIE1A)
|
||||
#define INTERRUPT_DISABLE_CHANNEL_A (0 << OCIE1A)
|
||||
|
||||
#endif // TIMER_H
|
||||
27
module02/ex02/usart.h
Normal file
27
module02/ex02/usart.h
Normal file
@@ -0,0 +1,27 @@
|
||||
#ifndef USART_H
|
||||
#define USART_H
|
||||
|
||||
#define BAUD_PRESCALER(usart_baudrate) (DIV_ROUND_CLOSEST(F_CPU, (16 * usart_baudrate)) - 1)
|
||||
// Table 20-8 : Mode Selection (USART Mode SELect)
|
||||
#define ASYNCHRONOUS (0<<UMSEL01 | 0<<UMSEL00)
|
||||
#define SYNCHRONOUS (0<<UMSEL01 | 1<<UMSEL00)
|
||||
// Table 20-9 : Parity Bit Selection (USART Parity Mode)
|
||||
#define PARITY_DISABLED (0<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_EVEN (1<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_ODD (1<<UPM01 | 1<<UPM00)
|
||||
// Table 20-10 : Stop Bit Selection (USART Stop Bit Select)
|
||||
#define STOP_ONE_BIT (0<<USBS0)
|
||||
#define STOP_TWO_BIT (1<<USBS0)
|
||||
// Table 20-11 : Data Bit Selection (USART Character SiZe)
|
||||
#define DATA_FIVE_BIT (0<<UCSZ02 | 0<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_SIX_BIT (0<<UCSZ02 | 0<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_SEVEN_BIT (0<<UCSZ02 | 1<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_EIGHT_BIT (0<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_NINE_BIT (1<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
// 20.11.3 : USART Control and Status Register B (UCSRnB)
|
||||
#define RECEIVER_DISABLED (0<<RXEN0)
|
||||
#define RECEIVER_ENABLED (1<<RXEN0)
|
||||
#define TRANSMITTER_DISABLED (0<<TXEN0)
|
||||
#define TRANSMITTER_ENABLED (1<<TXEN0)
|
||||
|
||||
#endif // USART_H
|
||||
16
module02/ex02/utils.h
Normal file
16
module02/ex02/utils.h
Normal file
@@ -0,0 +1,16 @@
|
||||
#ifndef UTILS_H
|
||||
#define UTILS_H
|
||||
|
||||
// stringify
|
||||
#define STRINGIFY_HELPER(x) #x
|
||||
#define STRINGIFY(x) STRINGIFY_HELPER(x)
|
||||
|
||||
// concatenate
|
||||
#define CONCAT_HELPER(x, y) x ## y
|
||||
#define CONCAT(x, y) CONCAT_HELPER(x, y)
|
||||
|
||||
// mathematics
|
||||
#define PERCENT(percent, total) (((float)percent / 100) * total)
|
||||
#define DIV_ROUND_CLOSEST(n, d) ((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d)))
|
||||
|
||||
#endif // UTILS_H
|
||||
53
module02/ex03/bitmanip.h
Normal file
53
module02/ex03/bitmanip.h
Normal file
@@ -0,0 +1,53 @@
|
||||
#ifndef BITMANIP_H
|
||||
#define BITMANIP_H
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
// Bit operations on registers
|
||||
#define SET(register, bit) (register |= (1 << (bit)))
|
||||
#define CLEAR(register, bit) (register &= ~(1 << (bit)))
|
||||
#define TEST(register, bit) (register & (1 << (bit)))
|
||||
#define TOGGLE(register, bit) (register ^= (1 << (bit)))
|
||||
|
||||
// Get arguments from tuple-like definitions
|
||||
#define ARG_1(v1, v2) v1
|
||||
#define ARG_2(v1, v2) v2
|
||||
#define GET_PORT(args) ARG_1 args
|
||||
#define GET_BIT(args) ARG_2 args
|
||||
// // version with "LED1 B, D1" without parenthesis
|
||||
// #define ARG_1(v1, ...) v1
|
||||
// #define ARG_2(v1, v2, ...) v2
|
||||
// #define GET_PORT(...) ARG_1(__VA_ARGS__)
|
||||
// #define GET_BIT(...) ARG_2(__VA_ARGS__)
|
||||
|
||||
// Actions on elements
|
||||
// #define SET_ELEM(...) SET(CONCAT(PORT, GET_PORT(__VA_ARGS__)), GET_BIT(__VA_ARGS__)) // version for "LED1 B, D1" without parenthesis
|
||||
#define SET_ELEM(elem) SET(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define CLEAR_ELEM(elem) CLEAR(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TEST_ELEM(elem) TEST(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TOGGLE_ELEM(elem) TOGGLE(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
|
||||
#define MODE_OUTPUT(elem) SET(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define MODE_INPUT(elem) CLEAR(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TOGGLE_PIN(elem) SET(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TEST_PIN(elem) (TEST(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem)))
|
||||
#define IS_PIN_SET(elem) (TEST_PIN(elem) == 0)
|
||||
#define IS_PIN_CLEAR(elem) (TEST_PIN(elem) == 1)
|
||||
|
||||
// Bit definitions
|
||||
#define D1 0
|
||||
#define D2 1
|
||||
#define D3 2
|
||||
#define D4 4
|
||||
#define SW1 2
|
||||
#define SW2 4
|
||||
|
||||
// Elements (port, bit)
|
||||
#define LED1 (B, D1)
|
||||
#define LED2 (B, D2)
|
||||
#define LED3 (B, D3)
|
||||
#define LED4 (B, D4)
|
||||
#define BUTTON1 (D, SW1)
|
||||
#define BUTTON2 (D, SW2)
|
||||
|
||||
#endif // BITMANIP_H
|
||||
8
module02/ex03/interrupt.h
Normal file
8
module02/ex03/interrupt.h
Normal file
@@ -0,0 +1,8 @@
|
||||
#ifndef INTERRUPT_H
|
||||
#define INTERRUPT_H
|
||||
|
||||
// 7.3.1 : SREG – AVR Status Register
|
||||
#define ENABLE_GLOBAL_INTERRUPT (1<<7)
|
||||
#define DISABLE_GLOBAL_INTERRUPT (0<<7)
|
||||
|
||||
#endif // INTERRUPT_H
|
||||
@@ -2,127 +2,24 @@
|
||||
#include <util/delay.h>
|
||||
#include <avr/interrupt.h> // https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html
|
||||
|
||||
// mathematics
|
||||
#define DIV_ROUND_CLOSEST(n, d) ((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d))) // https://stackoverflow.com/a/18067292
|
||||
|
||||
// stringify
|
||||
#define STRINGIFY_HELPER(x) #x
|
||||
#define STRINGIFY(x) STRINGIFY_HELPER(x)
|
||||
|
||||
// concatenate
|
||||
#define CONCAT_HELPER(x, y) x ## y
|
||||
#define CONCAT(x, y) CONCAT_HELPER(x, y)
|
||||
|
||||
// get argument
|
||||
#define ARG_1(v1, v2) v1
|
||||
#define ARG_2(v1, v2) v2
|
||||
#define GET_PORT(args) ARG_1 args
|
||||
#define GET_BIT(args) ARG_2 args
|
||||
// // version with "LED1 B, D1" without parenthesis
|
||||
// #define ARG_1(v1, ...) v1
|
||||
// #define ARG_2(v1, v2, ...) v2
|
||||
// #define GET_PORT(...) ARG_1(__VA_ARGS__)
|
||||
// #define GET_BIT(...) ARG_2(__VA_ARGS__)
|
||||
|
||||
// actions on registers
|
||||
#define SET(register, bit) register |= 1 << bit
|
||||
#define CLEAR(register, bit) register &= ~(1 << bit)
|
||||
#define TEST(register, bit) (register & 1 << bit)
|
||||
#define TOGGLE(register, bit) register ^= 1 << bit
|
||||
|
||||
// actions on elements
|
||||
#define SET_ELEM(elem) SET(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
// #define SET_ELEM(...) SET(CONCAT(PORT, GET_PORT(__VA_ARGS__)), GET_BIT(__VA_ARGS__)) // version for "LED1 B, D1" without parenthesis
|
||||
#define CLEAR_ELEM(elem) CLEAR(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TEST_ELEM(elem) TEST(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TOGGLE_ELEM(elem) TOGGLE(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define MODE_OUTPUT(elem) SET(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define MODE_INPUT(elem) CLEAR(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TOGGLE_PIN(elem) SET(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TEST_PIN(elem) (TEST(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem)))
|
||||
#define IS_PIN_SET(elem) (TEST_PIN(elem) == 0)
|
||||
#define IS_PIN_CLEAR(elem) (TEST_PIN(elem) == 1)
|
||||
|
||||
// bits
|
||||
#define D1 0
|
||||
#define D2 1
|
||||
#define D3 2
|
||||
#define D4 4
|
||||
#define SW1 2
|
||||
#define SW2 4
|
||||
|
||||
// elements (port, bit)
|
||||
// #define LED1 B, D1
|
||||
#define LED1 (B, D1)
|
||||
#define LED2 (B, D2)
|
||||
#define LED3 (B, D3)
|
||||
#define LED4 (B, D4)
|
||||
#define BUTTON1 (D, SW1)
|
||||
#define BUTTON2 (D, SW2)
|
||||
#include "utils.h"
|
||||
#include "bitmanip.h"
|
||||
#include "timer.h"
|
||||
#include "usart.h"
|
||||
#include "interrupt.h"
|
||||
|
||||
// USART
|
||||
// Table 20-1 : Baud Rate Calculation
|
||||
#define USART_BAUDRATE 115200
|
||||
#define BAUD_PRESCALER (DIV_ROUND_CLOSEST(F_CPU, (16 * USART_BAUDRATE)) - 1)
|
||||
// Table 20-8 : Mode Selection (USART Mode SELect)
|
||||
#define ASYNCHRONOUS (0<<UMSEL01 | 0<<UMSEL00)
|
||||
#define SYNCHRONOUS (0<<UMSEL01 | 1<<UMSEL00)
|
||||
// Table 20-9 : Parity Bit Selection (USART Parity Mode)
|
||||
#define PARITY_DISABLED (0<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_EVEN (1<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_ODD (1<<UPM01 | 1<<UPM00)
|
||||
// Table 20-10 : Stop Bit Selection (USART Stop Bit Select)
|
||||
#define STOP_ONE_BIT (0<<USBS0)
|
||||
#define STOP_TWO_BIT (1<<USBS0)
|
||||
// Table 20-11 : Data Bit Selection (USART Character SiZe)
|
||||
#define DATA_FIVE_BIT (0<<UCSZ02 | 0<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_SIX_BIT (0<<UCSZ02 | 0<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_SEVEN_BIT (0<<UCSZ02 | 1<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_EIGHT_BIT (0<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_NINE_BIT (1<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
// 20.11.3 : USART Control and Status Register B (UCSRnB)
|
||||
#define RECEIVER_DISABLED (0<<RXEN0)
|
||||
#define RECEIVER_ENABLED (1<<RXEN0)
|
||||
#define TRANSMITTER_DISABLED (0<<TXEN0)
|
||||
#define TRANSMITTER_ENABLED (1<<TXEN0)
|
||||
#define INTERRUPT_RECEIVER_DISABLED (0<<RXCIE0)
|
||||
#define INTERRUPT_RECEIVER_ENABLED (1<<RXCIE0)
|
||||
#define INTERRUPT_TRANSMITTER_DISABLED (0<<TXCIE0)
|
||||
#define INTERRUPT_TRANSMITTER_ENABLED (1<<TXCIE0)
|
||||
|
||||
// TIMER
|
||||
#define PERIOD 2000
|
||||
#define TIME_MS(ms) (((F_CPU / PRESCALE_VALUE) * ms) / 1000)
|
||||
#define PRESCALE_VALUE 1024 // can be 1, 8, 64, 256, 1024
|
||||
// table 16-5 : prescale sets
|
||||
#define PRESCALE_SET(value) \
|
||||
((value) == 1 ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
|
||||
(value) == 8 ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
|
||||
(value) == 64 ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
|
||||
(value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
|
||||
(value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
|
||||
(0<<CS12 | 0<<CS11 | 0<<CS10))
|
||||
// Table 16-4 : Waveform Generation Mode Bit Description
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1B (0<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1A (1<<WGM11 | 1<<WGM10)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1A (1<<WGM11 | 0<<WGM10)
|
||||
// 16.11.8 : Timer/Counter1 Interrupt Mask Register
|
||||
#define INTERRUPT_ENABLE_CHANNEL_A (1 << OCIE1A)
|
||||
#define INTERRUPT_DISABLE_CHANNEL_A (0 << OCIE1A)
|
||||
|
||||
// text
|
||||
#define SWITCH_CASE(ch) (((ch) >= 'A' && (ch) <= 'Z') || ((ch) >= 'a' && (ch) <= 'z') ? ((ch) ^ (1 << 5)) : (ch))
|
||||
|
||||
// END MACROS
|
||||
|
||||
void uart_init() {
|
||||
UBRR0H = (unsigned char) (BAUD_PRESCALER >> 8); // 20.11.5 : UBRRnL and UBRRnH – USART Baud Rate Registers
|
||||
UBRR0L = (unsigned char) BAUD_PRESCALER;
|
||||
UBRR0H = (unsigned char) (BAUD_PRESCALER(USART_BAUDRATE) >> 8); // 20.11.5 : UBRRnL and UBRRnH – USART Baud Rate Registers
|
||||
UBRR0L = (unsigned char) BAUD_PRESCALER(USART_BAUDRATE);
|
||||
|
||||
UCSR0C |= ASYNCHRONOUS | PARITY_DISABLED | STOP_ONE_BIT | DATA_EIGHT_BIT; // 20.11.4 : set Frame Format
|
||||
|
||||
@@ -141,8 +38,8 @@ void uart_tx(char c) {
|
||||
|
||||
ISR(USART_RX_vect) { // Table 12-7 : we select the code for USART Receive
|
||||
// char received_char = uart_rx();
|
||||
char received_char = UDR0; // Read received character
|
||||
uart_tx(SWITCH_CASE(received_char)); // Toggle case and send back
|
||||
char received_char = UDR0; // Read received character
|
||||
uart_tx(SWITCH_CASE(received_char)); // Toggle case and send back
|
||||
}
|
||||
|
||||
// send back caracters received on serial port with case toggling, using interupt and empty infinite loop
|
||||
@@ -150,7 +47,7 @@ ISR(USART_RX_vect) { // Table 12-7 : we select the code for USART
|
||||
int main() {
|
||||
uart_init();
|
||||
|
||||
sei(); // enable global interrupts
|
||||
SREG |= ENABLE_GLOBAL_INTERRUPT; // 7.3.1 : Status Register, bit 7 : I – Global Interrupt Enable
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
27
module02/ex03/timer.h
Normal file
27
module02/ex03/timer.h
Normal file
@@ -0,0 +1,27 @@
|
||||
#ifndef TIMER_H
|
||||
#define TIMER_H
|
||||
|
||||
// table 16-5 : prescale sets
|
||||
#define PRESCALE_SET(value) \
|
||||
((value) == 1 ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
|
||||
(value) == 8 ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
|
||||
(value) == 64 ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
|
||||
(value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
|
||||
(value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
|
||||
(0<<CS12 | 0<<CS11 | 0<<CS10))
|
||||
#define TIME_MS(ms, prescale_value) (((F_CPU / prescale_value) * ms) / 1000)
|
||||
|
||||
// Table 16-4 : Waveform Generation Mode Bit Description
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1B (0<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1A (1<<WGM11 | 1<<WGM10)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1A (1<<WGM11 | 0<<WGM10)
|
||||
// 16.11.8 : Timer/Counter1 Interrupt Mask Register
|
||||
#define INTERRUPT_ENABLE_CHANNEL_A (1 << OCIE1A)
|
||||
#define INTERRUPT_DISABLE_CHANNEL_A (0 << OCIE1A)
|
||||
|
||||
#endif // TIMER_H
|
||||
31
module02/ex03/usart.h
Normal file
31
module02/ex03/usart.h
Normal file
@@ -0,0 +1,31 @@
|
||||
#ifndef USART_H
|
||||
#define USART_H
|
||||
|
||||
#define BAUD_PRESCALER(usart_baudrate) (DIV_ROUND_CLOSEST(F_CPU, (16 * usart_baudrate)) - 1)
|
||||
// Table 20-8 : Mode Selection (USART Mode SELect)
|
||||
#define ASYNCHRONOUS (0<<UMSEL01 | 0<<UMSEL00)
|
||||
#define SYNCHRONOUS (0<<UMSEL01 | 1<<UMSEL00)
|
||||
// Table 20-9 : Parity Bit Selection (USART Parity Mode)
|
||||
#define PARITY_DISABLED (0<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_EVEN (1<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_ODD (1<<UPM01 | 1<<UPM00)
|
||||
// Table 20-10 : Stop Bit Selection (USART Stop Bit Select)
|
||||
#define STOP_ONE_BIT (0<<USBS0)
|
||||
#define STOP_TWO_BIT (1<<USBS0)
|
||||
// Table 20-11 : Data Bit Selection (USART Character SiZe)
|
||||
#define DATA_FIVE_BIT (0<<UCSZ02 | 0<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_SIX_BIT (0<<UCSZ02 | 0<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_SEVEN_BIT (0<<UCSZ02 | 1<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_EIGHT_BIT (0<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_NINE_BIT (1<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
// 20.11.3 : USART Control and Status Register B (UCSRnB)
|
||||
#define RECEIVER_DISABLED (0<<RXEN0)
|
||||
#define RECEIVER_ENABLED (1<<RXEN0)
|
||||
#define TRANSMITTER_DISABLED (0<<TXEN0)
|
||||
#define TRANSMITTER_ENABLED (1<<TXEN0)
|
||||
#define INTERRUPT_RECEIVER_DISABLED (0<<RXCIE0)
|
||||
#define INTERRUPT_RECEIVER_ENABLED (1<<RXCIE0)
|
||||
#define INTERRUPT_TRANSMITTER_DISABLED (0<<TXCIE0)
|
||||
#define INTERRUPT_TRANSMITTER_ENABLED (1<<TXCIE0)
|
||||
|
||||
#endif // USART_H
|
||||
19
module02/ex03/utils.h
Normal file
19
module02/ex03/utils.h
Normal file
@@ -0,0 +1,19 @@
|
||||
#ifndef UTILS_H
|
||||
#define UTILS_H
|
||||
|
||||
// stringify
|
||||
#define STRINGIFY_HELPER(x) #x
|
||||
#define STRINGIFY(x) STRINGIFY_HELPER(x)
|
||||
|
||||
// concatenate
|
||||
#define CONCAT_HELPER(x, y) x ## y
|
||||
#define CONCAT(x, y) CONCAT_HELPER(x, y)
|
||||
|
||||
// mathematics
|
||||
#define PERCENT(percent, total) (((float)percent / 100) * total)
|
||||
#define DIV_ROUND_CLOSEST(n, d) ((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d)))
|
||||
|
||||
// text
|
||||
#define SWITCH_CASE(ch) (((ch) >= 'A' && (ch) <= 'Z') || ((ch) >= 'a' && (ch) <= 'z') ? ((ch) ^ (1 << 5)) : (ch))
|
||||
|
||||
#endif // UTILS_H
|
||||
53
module02/ex04/bitmanip.h
Normal file
53
module02/ex04/bitmanip.h
Normal file
@@ -0,0 +1,53 @@
|
||||
#ifndef BITMANIP_H
|
||||
#define BITMANIP_H
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
// Bit operations on registers
|
||||
#define SET(register, bit) (register |= (1 << (bit)))
|
||||
#define CLEAR(register, bit) (register &= ~(1 << (bit)))
|
||||
#define TEST(register, bit) (register & (1 << (bit)))
|
||||
#define TOGGLE(register, bit) (register ^= (1 << (bit)))
|
||||
|
||||
// Get arguments from tuple-like definitions
|
||||
#define ARG_1(v1, v2) v1
|
||||
#define ARG_2(v1, v2) v2
|
||||
#define GET_PORT(args) ARG_1 args
|
||||
#define GET_BIT(args) ARG_2 args
|
||||
// // version with "LED1 B, D1" without parenthesis
|
||||
// #define ARG_1(v1, ...) v1
|
||||
// #define ARG_2(v1, v2, ...) v2
|
||||
// #define GET_PORT(...) ARG_1(__VA_ARGS__)
|
||||
// #define GET_BIT(...) ARG_2(__VA_ARGS__)
|
||||
|
||||
// Actions on elements
|
||||
// #define SET_ELEM(...) SET(CONCAT(PORT, GET_PORT(__VA_ARGS__)), GET_BIT(__VA_ARGS__)) // version for "LED1 B, D1" without parenthesis
|
||||
#define SET_ELEM(elem) SET(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define CLEAR_ELEM(elem) CLEAR(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TEST_ELEM(elem) TEST(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TOGGLE_ELEM(elem) TOGGLE(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
|
||||
#define MODE_OUTPUT(elem) SET(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define MODE_INPUT(elem) CLEAR(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TOGGLE_PIN(elem) SET(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TEST_PIN(elem) (TEST(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem)))
|
||||
#define IS_PIN_SET(elem) (TEST_PIN(elem) == 0)
|
||||
#define IS_PIN_CLEAR(elem) (TEST_PIN(elem) == 1)
|
||||
|
||||
// Bit definitions
|
||||
#define D1 0
|
||||
#define D2 1
|
||||
#define D3 2
|
||||
#define D4 4
|
||||
#define SW1 2
|
||||
#define SW2 4
|
||||
|
||||
// Elements (port, bit)
|
||||
#define LED1 (B, D1)
|
||||
#define LED2 (B, D2)
|
||||
#define LED3 (B, D3)
|
||||
#define LED4 (B, D4)
|
||||
#define BUTTON1 (D, SW1)
|
||||
#define BUTTON2 (D, SW2)
|
||||
|
||||
#endif // BITMANIP_H
|
||||
8
module02/ex04/interrupt.h
Normal file
8
module02/ex04/interrupt.h
Normal file
@@ -0,0 +1,8 @@
|
||||
#ifndef INTERRUPT_H
|
||||
#define INTERRUPT_H
|
||||
|
||||
// 7.3.1 : SREG – AVR Status Register
|
||||
#define ENABLE_GLOBAL_INTERRUPT (1<<7)
|
||||
#define DISABLE_GLOBAL_INTERRUPT (0<<7)
|
||||
|
||||
#endif // INTERRUPT_H
|
||||
@@ -2,127 +2,23 @@
|
||||
#include <util/delay.h>
|
||||
#include <avr/interrupt.h> // https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html
|
||||
|
||||
// mathematics
|
||||
#define DIV_ROUND_CLOSEST(n, d) ((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d))) // https://stackoverflow.com/a/18067292
|
||||
|
||||
// text
|
||||
#define SWITCH_CASE(ch) (((ch) >= 'A' && (ch) <= 'Z') || ((ch) >= 'a' && (ch) <= 'z') ? ((ch) ^ (1 << 5)) : (ch))
|
||||
|
||||
// stringify
|
||||
#define STRINGIFY_HELPER(x) #x
|
||||
#define STRINGIFY(x) STRINGIFY_HELPER(x)
|
||||
|
||||
// concatenate
|
||||
#define CONCAT_HELPER(x, y) x ## y
|
||||
#define CONCAT(x, y) CONCAT_HELPER(x, y)
|
||||
|
||||
// get argument
|
||||
#define ARG_1(v1, v2) v1
|
||||
#define ARG_2(v1, v2) v2
|
||||
#define GET_PORT(args) ARG_1 args
|
||||
#define GET_BIT(args) ARG_2 args
|
||||
// // version with "LED1 B, D1" without parenthesis
|
||||
// #define ARG_1(v1, ...) v1
|
||||
// #define ARG_2(v1, v2, ...) v2
|
||||
// #define GET_PORT(...) ARG_1(__VA_ARGS__)
|
||||
// #define GET_BIT(...) ARG_2(__VA_ARGS__)
|
||||
|
||||
// actions on registers
|
||||
#define SET(register, bit) register |= 1 << bit
|
||||
#define CLEAR(register, bit) register &= ~(1 << bit)
|
||||
#define TEST(register, bit) (register & 1 << bit)
|
||||
#define TOGGLE(register, bit) register ^= 1 << bit
|
||||
|
||||
// actions on elements
|
||||
#define SET_ELEM(elem) SET(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
// #define SET_ELEM(...) SET(CONCAT(PORT, GET_PORT(__VA_ARGS__)), GET_BIT(__VA_ARGS__)) // version for "LED1 B, D1" without parenthesis
|
||||
#define CLEAR_ELEM(elem) CLEAR(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TEST_ELEM(elem) TEST(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TOGGLE_ELEM(elem) TOGGLE(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define MODE_OUTPUT(elem) SET(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define MODE_INPUT(elem) CLEAR(CONCAT(DDR, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TOGGLE_PIN(elem) SET(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem))
|
||||
#define TEST_PIN(elem) (TEST(CONCAT(PIN, GET_PORT(elem)), GET_BIT(elem)))
|
||||
#define IS_PIN_SET(elem) (TEST_PIN(elem) == 0)
|
||||
#define IS_PIN_CLEAR(elem) (TEST_PIN(elem) == 1)
|
||||
|
||||
// bits
|
||||
#define D1 0
|
||||
#define D2 1
|
||||
#define D3 2
|
||||
#define D4 4
|
||||
#define SW1 2
|
||||
#define SW2 4
|
||||
|
||||
// elements (port, bit)
|
||||
// #define LED1 B, D1
|
||||
#define LED1 (B, D1)
|
||||
#define LED2 (B, D2)
|
||||
#define LED3 (B, D3)
|
||||
#define LED4 (B, D4)
|
||||
#define BUTTON1 (D, SW1)
|
||||
#define BUTTON2 (D, SW2)
|
||||
#include "utils.h"
|
||||
#include "bitmanip.h"
|
||||
#include "timer.h"
|
||||
#include "usart.h"
|
||||
#include "interrupt.h"
|
||||
|
||||
// USART
|
||||
// Table 20-1 : Baud Rate Calculation
|
||||
#define USART_BAUDRATE 115200
|
||||
#define BAUD_PRESCALER (DIV_ROUND_CLOSEST(F_CPU, (16 * USART_BAUDRATE)) - 1)
|
||||
// Table 20-8 : Mode Selection (USART Mode SELect)
|
||||
#define ASYNCHRONOUS (0<<UMSEL01 | 0<<UMSEL00)
|
||||
#define SYNCHRONOUS (0<<UMSEL01 | 1<<UMSEL00)
|
||||
// Table 20-9 : Parity Bit Selection (USART Parity Mode)
|
||||
#define PARITY_DISABLED (0<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_EVEN (1<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_ODD (1<<UPM01 | 1<<UPM00)
|
||||
// Table 20-10 : Stop Bit Selection (USART Stop Bit Select)
|
||||
#define STOP_ONE_BIT (0<<USBS0)
|
||||
#define STOP_TWO_BIT (1<<USBS0)
|
||||
// Table 20-11 : Data Bit Selection (USART Character SiZe)
|
||||
#define DATA_FIVE_BIT (0<<UCSZ02 | 0<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_SIX_BIT (0<<UCSZ02 | 0<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_SEVEN_BIT (0<<UCSZ02 | 1<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_EIGHT_BIT (0<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_NINE_BIT (1<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
// 20.11.3 : USART Control and Status Register B (UCSRnB)
|
||||
#define RECEIVER_DISABLED (0<<RXEN0)
|
||||
#define RECEIVER_ENABLED (1<<RXEN0)
|
||||
#define TRANSMITTER_DISABLED (0<<TXEN0)
|
||||
#define TRANSMITTER_ENABLED (1<<TXEN0)
|
||||
#define INTERRUPT_RECEIVER_DISABLED (0<<RXCIE0)
|
||||
#define INTERRUPT_RECEIVER_ENABLED (1<<RXCIE0)
|
||||
#define INTERRUPT_TRANSMITTER_DISABLED (0<<TXCIE0)
|
||||
#define INTERRUPT_TRANSMITTER_ENABLED (1<<TXCIE0)
|
||||
|
||||
#define USART_BAUDRATE 115200
|
||||
// TIMER
|
||||
#define PERIOD 2000
|
||||
#define TIME_MS(ms) (((F_CPU / PRESCALE_VALUE) * ms) / 1000)
|
||||
#define PRESCALE_VALUE 1024 // can be 1, 8, 64, 256, 1024
|
||||
// table 16-5 : prescale sets
|
||||
#define PRESCALE_SET(value) \
|
||||
((value) == 1 ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
|
||||
(value) == 8 ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
|
||||
(value) == 64 ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
|
||||
(value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
|
||||
(value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
|
||||
(0<<CS12 | 0<<CS11 | 0<<CS10))
|
||||
// Table 16-4 : Waveform Generation Mode Bit Description
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1B (0<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1A (1<<WGM11 | 1<<WGM10)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1A (1<<WGM11 | 0<<WGM10)
|
||||
// 16.11.8 : Timer/Counter1 Interrupt Mask Register
|
||||
#define INTERRUPT_ENABLE_CHANNEL_A (1 << OCIE1A)
|
||||
#define INTERRUPT_DISABLE_CHANNEL_A (0 << OCIE1A)
|
||||
#define PERIOD 2000
|
||||
#define PRESCALE_VALUE 1024 // can be 1, 8, 64, 256, 1024
|
||||
|
||||
// END MACROS
|
||||
|
||||
void uart_init() {
|
||||
UBRR0H = (unsigned char) (BAUD_PRESCALER >> 8); // 20.11.5 : UBRRnL and UBRRnH – USART Baud Rate Registers
|
||||
UBRR0L = (unsigned char) BAUD_PRESCALER;
|
||||
UBRR0H = (unsigned char) (BAUD_PRESCALER(USART_BAUDRATE) >> 8); // 20.11.5 : UBRRnL and UBRRnH – USART Baud Rate Registers
|
||||
UBRR0L = (unsigned char) BAUD_PRESCALER(USART_BAUDRATE);
|
||||
|
||||
UCSR0C |= ASYNCHRONOUS | PARITY_DISABLED | STOP_ONE_BIT | DATA_EIGHT_BIT; // 20.11.4 : set Frame Format
|
||||
|
||||
@@ -151,12 +47,12 @@ ISR(USART_RX_vect) { // Table 12-7 : we select the code for USART
|
||||
}
|
||||
}
|
||||
|
||||
// send back caracters received on serial port with case toggling, using interupt and empty infinite loop
|
||||
// ask for username and password
|
||||
// `screen /dev/ttyUSB0 115200`
|
||||
int main() {
|
||||
uart_init();
|
||||
|
||||
sei(); // enable global interrupts
|
||||
SREG |= ENABLE_GLOBAL_INTERRUPT; // 7.3.1 : Status Register, bit 7 : I – Global Interrupt Enable
|
||||
|
||||
while(1);
|
||||
}
|
||||
|
||||
27
module02/ex04/timer.h
Normal file
27
module02/ex04/timer.h
Normal file
@@ -0,0 +1,27 @@
|
||||
#ifndef TIMER_H
|
||||
#define TIMER_H
|
||||
|
||||
// table 16-5 : prescale sets
|
||||
#define PRESCALE_SET(value) \
|
||||
((value) == 1 ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
|
||||
(value) == 8 ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
|
||||
(value) == 64 ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
|
||||
(value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
|
||||
(value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
|
||||
(0<<CS12 | 0<<CS11 | 0<<CS10))
|
||||
#define TIME_MS(ms, prescale_value) (((F_CPU / prescale_value) * ms) / 1000)
|
||||
|
||||
// Table 16-4 : Waveform Generation Mode Bit Description
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1B (0<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_OCR1A_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define CTC_TOP_ICR1_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_OCR1A_IN_TCCR1A (1<<WGM11 | 1<<WGM10)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
|
||||
#define FAST_PWM_TOP_ICR1_IN_TCCR1A (1<<WGM11 | 0<<WGM10)
|
||||
// 16.11.8 : Timer/Counter1 Interrupt Mask Register
|
||||
#define INTERRUPT_ENABLE_CHANNEL_A (1 << OCIE1A)
|
||||
#define INTERRUPT_DISABLE_CHANNEL_A (0 << OCIE1A)
|
||||
|
||||
#endif // TIMER_H
|
||||
31
module02/ex04/usart.h
Normal file
31
module02/ex04/usart.h
Normal file
@@ -0,0 +1,31 @@
|
||||
#ifndef USART_H
|
||||
#define USART_H
|
||||
|
||||
#define BAUD_PRESCALER(usart_baudrate) (DIV_ROUND_CLOSEST(F_CPU, (16 * usart_baudrate)) - 1)
|
||||
// Table 20-8 : Mode Selection (USART Mode SELect)
|
||||
#define ASYNCHRONOUS (0<<UMSEL01 | 0<<UMSEL00)
|
||||
#define SYNCHRONOUS (0<<UMSEL01 | 1<<UMSEL00)
|
||||
// Table 20-9 : Parity Bit Selection (USART Parity Mode)
|
||||
#define PARITY_DISABLED (0<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_EVEN (1<<UPM01 | 0<<UPM00)
|
||||
#define PARITY_ODD (1<<UPM01 | 1<<UPM00)
|
||||
// Table 20-10 : Stop Bit Selection (USART Stop Bit Select)
|
||||
#define STOP_ONE_BIT (0<<USBS0)
|
||||
#define STOP_TWO_BIT (1<<USBS0)
|
||||
// Table 20-11 : Data Bit Selection (USART Character SiZe)
|
||||
#define DATA_FIVE_BIT (0<<UCSZ02 | 0<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_SIX_BIT (0<<UCSZ02 | 0<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_SEVEN_BIT (0<<UCSZ02 | 1<<UCSZ01 | 0<<UCSZ00)
|
||||
#define DATA_EIGHT_BIT (0<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
#define DATA_NINE_BIT (1<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
|
||||
// 20.11.3 : USART Control and Status Register B (UCSRnB)
|
||||
#define RECEIVER_DISABLED (0<<RXEN0)
|
||||
#define RECEIVER_ENABLED (1<<RXEN0)
|
||||
#define TRANSMITTER_DISABLED (0<<TXEN0)
|
||||
#define TRANSMITTER_ENABLED (1<<TXEN0)
|
||||
#define INTERRUPT_RECEIVER_DISABLED (0<<RXCIE0)
|
||||
#define INTERRUPT_RECEIVER_ENABLED (1<<RXCIE0)
|
||||
#define INTERRUPT_TRANSMITTER_DISABLED (0<<TXCIE0)
|
||||
#define INTERRUPT_TRANSMITTER_ENABLED (1<<TXCIE0)
|
||||
|
||||
#endif // USART_H
|
||||
19
module02/ex04/utils.h
Normal file
19
module02/ex04/utils.h
Normal file
@@ -0,0 +1,19 @@
|
||||
#ifndef UTILS_H
|
||||
#define UTILS_H
|
||||
|
||||
// stringify
|
||||
#define STRINGIFY_HELPER(x) #x
|
||||
#define STRINGIFY(x) STRINGIFY_HELPER(x)
|
||||
|
||||
// concatenate
|
||||
#define CONCAT_HELPER(x, y) x ## y
|
||||
#define CONCAT(x, y) CONCAT_HELPER(x, y)
|
||||
|
||||
// mathematics
|
||||
#define PERCENT(percent, total) (((float)percent / 100) * total)
|
||||
#define DIV_ROUND_CLOSEST(n, d) ((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d)))
|
||||
|
||||
// text
|
||||
#define SWITCH_CASE(ch) (((ch) >= 'A' && (ch) <= 'Z') || ((ch) >= 'a' && (ch) <= 'z') ? ((ch) ^ (1 << 5)) : (ch))
|
||||
|
||||
#endif // UTILS_H
|
||||
Reference in New Issue
Block a user