m05e01 done

This commit is contained in:
hugogogo
2025-03-15 13:17:46 +01:00
parent 2fd1d7d931
commit 5904f7c5e0
4 changed files with 67 additions and 36 deletions

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@@ -1,25 +1,34 @@
#include "header.h"
// Table 14-6. Port C Pins Alternate Functions
// - PC0 -> ADC0 (ADC Input Channel 0)
// -> PCINT8 (Pin Change Interrupt 8)
//
// 24.2 : The ADC generates a 10-bit result which is presented in the ADC Data Registers, ADCH and ADCL
//
// START A CONVERSTION in single conversion mode :
// - disabling the Power Reduction ADC bit, PRADC
// - writing a logical one to the ADC Start Conversion bit, ADSC
void adc_init(uint8_t prescaler_value) {
ADMUX = (1 << REFS0); // Table 24-3 : set voltage reference, AVCC with external capacitor at AREF pin
ADCSRA = (1 << ADEN); // 24.9.2 : enable ADC
ADCSRA |= ADC_PRESCALE_SET(prescaler_value); // Table 24-5 : prescaler ADC
ADMUX = (1 << REFS0); // Table 24-3 : set voltage reference, AVCC with external capacitor at AREF pin
ADCSRA = (1 << ADEN); // 24.9.2 : enable ADC
ADCSRA |= (1 << ADATE); // 24.9.2 : enable Auto Trigger -> it will start a conversion on the selected channel in ADMUX when the selected source (in ADCSRB) is triggered
ADCSRA |= (1 << ADIE); // 24.9.2 : enable ADC Interrupt
ADCSRA |= ADC_PRESCALE_SET(prescaler_value); // Table 24-5 : prescaler ADC
ADCSRB = ADC_TRIGGER_TIMER_1_COMPARE_B; // Table 24-6 : ADC Auto Trigger Source
ADMUX = (ADMUX & 0b11110000) | (adc_channel & 0b1111); // Table 24-4 : Select ADC channel 0
}
uint16_t adc_read(uint8_t channel) {
CLEAR(PRR, PRADC); // 24.3 : ensure power reduction is disabled for ADC, (10.11.3 : PRR Power Reduction Register)
ADMUX = (ADMUX & 0b11110000) | (channel & 0b1111); // Table 24-4 : Select ADC channel, (Table 14-6 : alternate function for RV1 on PC0 -> ADC0)
ADCSRA |= (1 << ADSC); // 24.9.2 : Start conversion, ADSC: ADC Start Conversion
while (ADCSRA & (1 << ADSC)); // Wait for completion
return ADC;
void adc_print_hex(uint8_t value) {
char buffer[3] = {0};
int_to_hex_string(value, buffer, 2);
uart_printstr(buffer);
}
ISR(ADC_vect) { // Table 12-6 : interrupt vector for ADC Conversion Complete
uint16_t value = ADC;
adc_print_hex(value);
adc_channel = (adc_channel + 1) % 3; // loop through channels
ADMUX = (ADMUX & 0b11110000) | (adc_channel & 0b1111); // Table 24-4 : Select ADC channel
if (adc_channel != 0) {
uart_printstr(", ");
ADCSRA |= (1 << ADSC); // 24.9.2 : start next conversion
} else {
uart_printstr("\r\n");
}
}

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@@ -16,6 +16,9 @@
// PROTOTYPES
//
// main.c
// timer.c
void timer_1B_init();
// math.c
void int_to_hex_string(uint64_t value, char *out, uint8_t num_digits);
// adc.c
void adc_init(uint8_t prescaler_value);

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@@ -2,31 +2,28 @@
// 1.1.7 : AVCC is the supply voltage pin for the A/D Converter, PC3:0, and ADC7:6
// 1.1.8 : AREF is the analog reference pin for the A/D Converter
// 24.4 : frequency needs to be between 50kHz and 200kHz, for less than 10bits accuracy it can be >200kHz
// -> Frequence_ADC = Frequance_CPU / Prescaler (Fadc = Fcpu/P):
// - P = 2 -> Fadc = 16,000,000 / 2 = 8,000,000 = 8MHz
// - P = 4 -> Fadc = 16,000,000 / 4 = 4,000,000 = 4MHz
// - P = 8 -> Fadc = 16,000,000 / 8 = 2,000,000 = 2MHz
// - P = 16 -> Fadc = 16,000,000 / 16 = 1,000,000 = 1MHz
// - P = 32 -> Fadc = 16,000,000 / 32 = 500,000 = 500KHz
// - P = 64 -> Fadc = 16,000,000 / 64 = 250,000 = 250KHz -> OK
// - P = 128 -> Fadc = 16,000,000 / 128 = 125,000 = 125KHz -> OK
#define ADC_PRESCALER 8
#define ADC_PRESCALER 64 // Table 24-5 : can only be 2, 4, 8, 16, 32, 64, or 128
void int_to_hex_string(uint64_t value, char *out, uint8_t num_digits) { // num_digits : number of digit of the output, ex 2 for 3FF (1023) -> FF
for (uint8_t i = 0; i < num_digits; ++i) {
uint8_t shift = (num_digits - 1 - i) * 4;
out[i] = INT_TO_HEX_CHAR((value >> shift) & 0x0F);
}
out[num_digits] = '\0';
}
volatile uint8_t adc_channel = 0; // Table 14-6 : alternate function for RV1 on PC0 -> ADC0, LDR on PC1 -> ADC1, NTC on PC2 -> ADC2 ...
// description
// read 3 analog values and print them in uart as hexadecimal 2-number : potentiometer RV1 (Variable Resistor), photoresistor LDR (Light Dependent Resistor), thermistor NTC (Negative Temperature Coefficient)
int main() {
char buffer[4];
SREG |= ENABLE_GLOBAL_INTERRUPT; // 7.3.1 : Status Register, bit 7 : I Global Interrupt Enable
SREG |= ENABLE_GLOBAL_INTERRUPT; // 7.3.1 : Status Register, bit 7 : I Global Interrupt Enable
uart_init();
adc_init(ADC_PRESCALER);
while(1) {
uint16_t value = adc_read(0); // Read from ADC0 (A0)
int_to_hex_string(value, buffer, 3);
uart_printstr_endl(buffer);
_delay_ms(20); // Wait 20ms
}
}
timer_1B_init();
// ISR(ADC_vect) { // Table 12-6 : interrupt vector for ADC Conversion Complete
// }
while(1);
}

22
module05/ex01/timer.c Normal file
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@@ -0,0 +1,22 @@
#include "header.h"
// Set up Timer1 in CTC mode to trigger every 20ms
// With 16MHz clock and prescaler of 64, and OCR1A = 49999:
// 16000000/64/50000 = 20ms period
#define T1B_PRESCALE_VALUE 64
void timer_1B_init() {
TCCR1A = 0; // 16.11.1 : Normal operation, OC1A/OC1B disconnected
TCCR1B = CTC_TOP_OCR1A_IN_TCCR1B; // 16.11.2 : CTC mode top OCR1A
TCCR1B |= T1_PRESCALE_SET(T1B_PRESCALE_VALUE); // 16.11.2 : prescaler
OCR1A = TIME_MS(20, T1B_PRESCALE_VALUE); // 16.11.5 : Compare match value for register A
OCR1B = 0; // 16.11.6 : Compare match value for register B, if not defined, should default to 0
TIMSK1 = (1 << OCIE1B); // 16.11.8 : Enable Timer1 Compare B Match Interrupt
}
ISR(TIMER1_COMPB_vect) {
// Empty ISR to ensure proper flag clearing or something like that (p145 : "OCF1B is automatically cleared when the Output Compare Match B Interrupt Vector is executed")
}