exo01 ok with comments
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@@ -107,6 +107,8 @@
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#define FAST_PWM_TOP_OCR1A_IN_TCCR1A (1<<WGM11 | 1<<WGM10)
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#define FAST_PWM_TOP_OCR1A_IN_TCCR1A (1<<WGM11 | 1<<WGM10)
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#define FAST_PWM_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
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#define FAST_PWM_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
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#define FAST_PWM_TOP_ICR1_IN_TCCR1A (1<<WGM11 | 0<<WGM10)
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#define FAST_PWM_TOP_ICR1_IN_TCCR1A (1<<WGM11 | 0<<WGM10)
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#define INTERRUPT_ENABLE_CHANNEL_A (1 << OCIE1A)
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#define INTERRUPT_DISABLE_CHANNEL_A (0 << OCIE1A)
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// END MACROS
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// END MACROS
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@@ -139,8 +141,8 @@ int main() {
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TCCR1A |= CTC_TOP_OCR1A_IN_TCCR1A; // Table 16-4 : set timer in CTC (Clear Time on Compare) mode
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TCCR1A |= CTC_TOP_OCR1A_IN_TCCR1A; // Table 16-4 : set timer in CTC (Clear Time on Compare) mode
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TCCR1B |= CTC_TOP_OCR1A_IN_TCCR1B;
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TCCR1B |= CTC_TOP_OCR1A_IN_TCCR1B;
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TIMSK1 |= (1 << OCIE1A); // Enable CTC interrupt
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sei(); // enable global interrupts (https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html#gaad5ebd34cb344c26ac87594f79b06b73)
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sei(); // Enable global interrupts
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TIMSK1 |= INTERRUPT_ENABLE_CHANNEL_A; // 16.11.8 : enables the Timer1 Compare Match A interrupt, this makes the MCU react when OCR1A == TCNT1 by calling TIMER1_COMPA_vect
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OCR1A = TIME_MS(PERIOD); // Table 16-4 : set CTC compare value on channel A, the counter is cleared to zero when the counter value (TCNT1) matches the OCR1A register
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OCR1A = TIME_MS(PERIOD); // Table 16-4 : set CTC compare value on channel A, the counter is cleared to zero when the counter value (TCNT1) matches the OCR1A register
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@@ -150,6 +152,6 @@ int main() {
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}
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}
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// ISR interrupt macro : https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html
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// ISR interrupt macro : https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html
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ISR(TIMER1_COMPA_vect) { // Table 12-7 :
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ISR(TIMER1_COMPA_vect) { // Table 12-7 : we select the code for timer 1 on channel A
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uart_printstr("Hello World!");
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uart_printstr("Hello World!");
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}
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}
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