diff --git a/module02/ex01/main.c b/module02/ex01/main.c
index 9ec71cb..fb8bfb9 100644
--- a/module02/ex01/main.c
+++ b/module02/ex01/main.c
@@ -107,6 +107,8 @@
 #define FAST_PWM_TOP_OCR1A_IN_TCCR1A							(1<<WGM11 | 1<<WGM10)
 #define FAST_PWM_TOP_ICR1_IN_TCCR1B		(1<<WGM13 | 1<<WGM12)
 #define FAST_PWM_TOP_ICR1_IN_TCCR1A								(1<<WGM11 | 0<<WGM10)
+#define INTERRUPT_ENABLE_CHANNEL_A		(1 << OCIE1A)
+#define INTERRUPT_DISABLE_CHANNEL_A		(0 << OCIE1A)
 
 // END MACROS
 
@@ -139,8 +141,8 @@ int main() {
 	TCCR1A |= CTC_TOP_OCR1A_IN_TCCR1A;				// Table 16-4 : set timer in CTC (Clear Time on Compare) mode
 	TCCR1B |= CTC_TOP_OCR1A_IN_TCCR1B;
 
-	TIMSK1 |= (1 << OCIE1A);						// Enable CTC interrupt
-	sei();											// Enable global interrupts
+	sei();											// enable global interrupts (https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html#gaad5ebd34cb344c26ac87594f79b06b73)
+	TIMSK1 |= INTERRUPT_ENABLE_CHANNEL_A;			// 16.11.8 : enables the Timer1 Compare Match A interrupt, this makes the MCU react when OCR1A == TCNT1 by calling TIMER1_COMPA_vect
 
 	OCR1A = TIME_MS(PERIOD);						// Table 16-4 : set CTC compare value on channel A, the counter is cleared to zero when the counter value (TCNT1) matches the OCR1A register
 
@@ -150,6 +152,6 @@ int main() {
 }
 
 // ISR interrupt macro : https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html
-ISR(TIMER1_COMPA_vect) {							// Table 12-7 : 
+ISR(TIMER1_COMPA_vect) {							// Table 12-7 : we select the code for timer 1 on channel A
 	uart_printstr("Hello World!");
 }