27 lines
1.2 KiB
C
27 lines
1.2 KiB
C
#ifndef TIMER_H
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#define TIMER_H
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// table 16-5 : prescale sets
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#define PRESCALE_SET(value) \
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((value) == 1 ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
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(value) == 8 ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
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(value) == 64 ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
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(value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
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(value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
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(0<<CS12 | 0<<CS11 | 0<<CS10))
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#define TIME_MS(ms, prescale_value) (((F_CPU / prescale_value) * ms) / 1000)
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// Table 16-4 : Waveform Generation Mode Bit Description
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#define CTC_TOP_OCR1A_IN_TCCR1B (0<<WGM13 | 1<<WGM12)
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#define CTC_TOP_OCR1A_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
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#define CTC_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
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#define CTC_TOP_ICR1_IN_TCCR1A (0<<WGM11 | 0<<WGM10)
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#define FAST_PWM_TOP_OCR1A_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
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#define FAST_PWM_TOP_OCR1A_IN_TCCR1A (1<<WGM11 | 1<<WGM10)
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#define FAST_PWM_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
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#define FAST_PWM_TOP_ICR1_IN_TCCR1A (1<<WGM11 | 0<<WGM10)
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// 16.11.8 : Timer/Counter1 Interrupt Mask Register
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#define INTERRUPT_ENABLE_CHANNEL_A (1 << OCIE1A)
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#define INTERRUPT_DISABLE_CHANNEL_A (0 << OCIE1A)
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#endif // TIMER_H
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