From fe0249bc051001e9898108c151ccce4dbf65c5e3 Mon Sep 17 00:00:00 2001
From: hugo LAMY <hugo.lamy@oskey.io>
Date: Thu, 6 Mar 2025 22:07:56 +0100
Subject: [PATCH] mod02 ex00 ok

---
 module02/ex00/main.c | 62 +++++++++++++++++++++++++++++++++++++-------
 1 file changed, 52 insertions(+), 10 deletions(-)

diff --git a/module02/ex00/main.c b/module02/ex00/main.c
index 0eb48ef..b491739 100644
--- a/module02/ex00/main.c
+++ b/module02/ex00/main.c
@@ -2,6 +2,9 @@
 #include <util/delay.h>
 #include <avr/interrupt.h>
 
+// mathematics
+#define DIV_ROUND_CLOSEST(n, d) ((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d)))
+
 // stringify
 #define STRINGIFY_HELPER(x)		#x
 #define STRINGIFY(x)			STRINGIFY_HELPER(x)
@@ -15,15 +18,21 @@
 #define ARG_2(v1, v2)			v2
 #define GET_PORT(args)			ARG_1 args
 #define GET_BIT(args)			ARG_2 args
+// // version with "LED1 B, D1" without parenthesis
+// #define ARG_1(v1, ...)			v1
+// #define ARG_2(v1, v2, ...)		v2
+// #define GET_PORT(...)			ARG_1(__VA_ARGS__)
+// #define GET_BIT(...)			ARG_2(__VA_ARGS__)
 
 // actions on registers
 #define SET(register, bit)		register |= 1 << bit
 #define CLEAR(register, bit)	register &= ~(1 << bit)
-#define TEST(register, bit)		register & 1 << bit
+#define TEST(register, bit)		(register & 1 << bit)
 #define TOGGLE(register, bit)	register ^= 1 << bit
 
 // actions on elements
 #define SET_ELEM(elem)			SET(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
+// #define SET_ELEM(...)			SET(CONCAT(PORT, GET_PORT(__VA_ARGS__)), GET_BIT(__VA_ARGS__)) // version for "LED1 B, D1" without parenthesis
 #define CLEAR_ELEM(elem)		CLEAR(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
 #define TEST_ELEM(elem)			TEST(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
 #define TOGGLE_ELEM(elem)		TOGGLE(CONCAT(PORT, GET_PORT(elem)), GET_BIT(elem))
@@ -43,6 +52,7 @@
 #define SW2	4
 
 // elements (port, bit)
+// #define LED1	B, D1
 #define LED1	(B, D1)
 #define LED2	(B, D2)
 #define LED3	(B, D3)
@@ -50,22 +60,54 @@
 #define BUTTON1	(D, SW1)
 #define BUTTON2	(D, SW2)
 
-// TIMER
-#define TIME_MS(ms)					(((F_CPU / PRESCALE_VALUE) * ms) / 1000)
-
-// UART
-#define UART_BAUDRATE				115200
+// USART
+// Table 20-1 : Baud Rate Calculation
+#define USART_BAUDRATE			115200
+#define BAUD_PRESCALER			(DIV_ROUND_CLOSEST(F_CPU, (16 * USART_BAUDRATE)) - 1)
+// Table 20-8 : Mode Selection
+#define ASYNCHRONOUS			(0<<UMSEL01 | 0<<UMSEL00)
+#define SYNCHRONOUS				(0<<UMSEL01 | 1<<UMSEL00)
+// Table 20-9 : Parity Bit Selection
+#define PARITY_DISABLED			(0<<UPM01 | 0<<UPM00)
+#define PARITY_EVEN				(1<<UPM01 | 0<<UPM00)
+#define PARITY_ODD				(1<<UPM01 | 1<<UPM00)
+// Table 20-10 : Stop Bit Selection
+#define STOP_ONE_BIT			(0<<USBS0)
+#define STOP_TWO_BIT			(1<<USBS0)
+// Table 20-11 : Data Bit Selection
+#define DATA_FIVE_BIT			(0<<UCSZ02 | 0<<UCSZ01 | 0<<UCSZ00)
+#define DATA_SIX_BIT			(0<<UCSZ02 | 0<<UCSZ01 | 1<<UCSZ00)
+#define DATA_SEVEN_BIT			(0<<UCSZ02 | 1<<UCSZ01 | 0<<UCSZ00)
+#define DATA_EIGHT_BIT			(0<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
+#define DATA_NINE_BIT			(1<<UCSZ02 | 1<<UCSZ01 | 1<<UCSZ00)
+// 20.11.3 : USART Control and Status Register B (UCSRnB)
+#define RECEIVER_DISABLED		(0<<RXEN0)
+#define RECEIVER_ENABLED		(1<<RXEN0)
+#define TRANSMITTER_DISABLED	(0<<TXEN0)
+#define TRANSMITTER_ENABLED		(1<<TXEN0)
 
 // END MACROS
 
-void uart_init() {}
+// 20.4 Frame Formats : 8N1 : 8 data bits, no parity, 1 stop bit
+// 20.5 USART Initialization : (1) setting baud rate, (2) setting frame format, (3) enabling the Transmitter or the Receiver
+void uart_init() {
+	UBRR0H = BAUD_PRESCALER >> 8;												// 20.11.5 : UBRRnL and UBRRnH – USART Baud Rate Registers
+	UBRR0L = BAUD_PRESCALER;
 
-void uart_tx(char c) {}
+	UCSR0C = ASYNCHRONOUS | PARITY_DISABLED | STOP_ONE_BIT | DATA_EIGHT_BIT;	// 20.11.4 : set Frame Format
+	
+	UCSR0B = RECEIVER_ENABLED | TRANSMITTER_ENABLED;							// 20.11.3 : enable Receiver and Transmitter
+}
+
+void uart_tx(char c) {
+	while (TEST(UCSR0A, UDRE0) == 0);		// 20.11.2 : do nothing until UDR emission buffer is empty, if UDREn flag is 1, UCSRnA register is empty
+	UDR0 = c;								// 20.11.1 : Put data into buffer, UDRn – USART I/O Data Register (read and write)
+}
 
 int main() {
 	uart_init();
 	while (1) {
 		uart_tx('Z');
-		_delay_ms(TIME_MS(1000));
+		_delay_ms(1000);
 	}
-}
\ No newline at end of file
+}