42/42_EXT_03_42chips
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updated prescaler values

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This commit is contained in:
hugo LAMY
2025-03-07 09:09:00 +01:00
parent d08cc9fd4c
commit 936c591be4
4 changed files with 40 additions and 28 deletions
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15
module01/ex00/main.c
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@@ -49,17 +49,18 @@
#define BUTTON2 (D, SW2)
// TIME
#define PRESCALE_VALUE 1024
#define PRESCALE_VALUE 1024 // can be 1, 8, 64, 256, 1024
// table 16-5 : prescale sets
#if (PRESCALE_VALUE == 1)
#define PRESCALE_SET (1 << CS10)
#define PRESCALE_SET (0<<CS12 | 0<<CS11 | 1<<CS10)
#elif (PRESCALE_VALUE == 8)
#define PRESCALE_SET (1 << CS11)
#define PRESCALE_SET (0<<CS12 | 1<<CS11 | 0<<CS10)
#elif (PRESCALE_VALUE == 64)
#define PRESCALE_SET (1 << CS10) | (1 << CS11)
#define PRESCALE_SET (0<<CS12 | 1<<CS11 | 1<<CS10)
#elif (PRESCALE_VALUE == 256)
#define PRESCALE_SET (1 << CS12)
#define PRESCALE_SET (1<<CS12 | 0<<CS11 | 0<<CS10)
#elif (PRESCALE_VALUE == 1024)
#define PRESCALE_SET (1 << CS10) | (1 << CS12)
#define PRESCALE_SET (1<<CS12 | 0<<CS11 | 1<<CS10)
#endif
#define TIME_MS(ms) (((F_CPU / PRESCALE_VALUE) * ms) / 1000)
@@ -69,7 +70,7 @@ int main() {
MODE_OUTPUT(LED2);
CLEAR_ELEM(LED2);
TCCR1B |= (PRESCALE_SET); // 16.4 : set timer with bits CS10-12, in register TCCR1B, table 16-5 : prescale values
TCCR1B |= (PRESCALE_SET); // 16.4 : set timer according to prescale value, in register TCCR1B, table 16-5 : prescale sets
while(1) {
if (TCNT1 >= TIME_MS(500)) { // 16.11.4 : read timer with register TCNT1 (read/write allowed), that combines two 8 bits registers