From 6ef217c05eac233aff2a13b0b82f2156be2f45e4 Mon Sep 17 00:00:00 2001 From: hugo LAMY Date: Fri, 14 Mar 2025 14:15:49 +0100 Subject: [PATCH] m05e00 values ok prescaler and 8bits --- .vscode/settings.json | 2 ++ module05/ex00/adc.c | 5 ++--- module05/ex00/main.c | 21 +++++++++++++++------ 3 files changed, 19 insertions(+), 9 deletions(-) diff --git a/.vscode/settings.json b/.vscode/settings.json index 1c07c9f..1d4434a 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -1,4 +1,6 @@ { + "editor.insertSpaces": false, + "editor.detectIndentation": false, "files.associations": { "io.h": "c", "delay.h": "c", diff --git a/module05/ex00/adc.c b/module05/ex00/adc.c index 968f3cb..bba9287 100644 --- a/module05/ex00/adc.c +++ b/module05/ex00/adc.c @@ -19,9 +19,8 @@ void adc_init(uint8_t prescaler_value) { uint16_t adc_read(uint8_t channel) { CLEAR(PRR, PRADC); // 24.3 : ensure power reduction is disabled for ADC, (10.11.3 : PRR – Power Reduction Register) ADMUX = (ADMUX & 0b11110000) | (channel & 0b1111); // Table 24-4 : Select ADC channel, (Table 14-6 : alternate function for RV1 on PC0 -> ADC0) - // ADMUX |= (1 << ADLAR); // 24.9.3 : enable left adjust result + ADMUX |= (1 << ADLAR); // 24.9.1 : enable left adjust result ADCSRA |= (1 << ADSC); // 24.9.2 : Start conversion, ADSC: ADC Start Conversion while (ADCSRA & (1 << ADSC)); // Wait for completion - // return ADCH; // 24.9.3 : ADC updated only when ADCH is read, not ADCL, so for 8 bits precision uses left adjust result to only read ADCH - return ADC; + return ADCH; // 24.9.3 : ADC updated only when ADCH is read, not ADCL, so for 8 bits precision uses left adjust result to only read ADCH } diff --git a/module05/ex00/main.c b/module05/ex00/main.c index 9bd1a3e..b3ab81a 100644 --- a/module05/ex00/main.c +++ b/module05/ex00/main.c @@ -2,10 +2,19 @@ // 1.1.7 : AVCC is the supply voltage pin for the A/D Converter, PC3:0, and ADC7:6 // 1.1.8 : AREF is the analog reference pin for the A/D Converter +// 24.4 : frequency needs to be between 50kHz and 200kHz, for less than 10bits accuracy it can be >200kHz +// -> Frequence_ADC = Frequance_CPU / Prescaler (Fadc = Fcpu/P): +// - P = 2 -> Fadc = 16,000,000 / 2 = 8,000,000 = 8MHz +// - P = 4 -> Fadc = 16,000,000 / 4 = 4,000,000 = 4MHz +// - P = 8 -> Fadc = 16,000,000 / 8 = 2,000,000 = 2MHz +// - P = 16 -> Fadc = 16,000,000 / 16 = 1,000,000 = 1MHz +// - P = 32 -> Fadc = 16,000,000 / 32 = 500,000 = 500KHz +// - P = 64 -> Fadc = 16,000,000 / 64 = 250,000 = 250KHz -> OK +// - P = 128 -> Fadc = 16,000,000 / 128 = 125,000 = 125KHz -> OK -#define ADC_PRESCALER 2 +#define ADC_PRESCALER 64 // Table 24-5 : can only be 2, 4, 8, 16, 32, 64, or 128 -void int_to_hex_string(uint64_t value, char *out, uint8_t num_digits) { // num_digits : number of digit of the output, ex 2 for 3FF (1023) -> FF +void int_to_hex_string(uint64_t value, char *out, uint8_t num_digits) { // num_digits : number of digit of the output, ex 2 for 3FF (1023) -> FF for (uint8_t i = 0; i < num_digits; ++i) { uint8_t shift = (num_digits - 1 - i) * 4; out[i] = INT_TO_HEX_CHAR((value >> shift) & 0x0F); @@ -16,15 +25,15 @@ void int_to_hex_string(uint64_t value, char *out, uint8_t num_digits) { // nu // description int main() { char buffer[4]; - SREG |= ENABLE_GLOBAL_INTERRUPT; // 7.3.1 : Status Register, bit 7 : I – Global Interrupt Enable + SREG |= ENABLE_GLOBAL_INTERRUPT; // 7.3.1 : Status Register, bit 7 : I – Global Interrupt Enable uart_init(); adc_init(ADC_PRESCALER); while(1) { - uint16_t value = adc_read(0); // Read from ADC0 (A0) - int_to_hex_string(value, buffer, 3); + uint16_t value = adc_read(0); // Read from ADC0 (A0) + int_to_hex_string(value, buffer, 2); uart_printstr_endl(buffer); - _delay_ms(20); // Wait 20ms + _delay_ms(20); // Wait 20ms } }