diff --git a/module01/ex00/main.c b/module01/ex00/main.c index 6c0f9b1..94d3932 100644 --- a/module01/ex00/main.c +++ b/module01/ex00/main.c @@ -54,10 +54,10 @@ int main() { TCCR1B |= (PRESCALE_SET); // set timer with prescale // -> set timer with bits CS10-12, in register TCCR1B : 16.4 Timer/Counter Clock Sources - // -> prescale values : 16.11.2 TCCR1B – Timer/Counter1 Control Register B, table 16-5. Clock Select Bit Description + // -> prescale values : table 16-5. Clock Select Bit Description while(1) { - if ( TCNT1 >= TIME_MS(500)) { // read timer with register TCNT1 (read/write allowed), that combines two 8 bits registers : 16.11.4 TCNT1H and TCNT1L – Timer/Counter1 + if (TCNT1 >= TIME_MS(500)) { // read timer with register TCNT1 (read/write allowed), that combines two 8 bits registers : 16.11.4 TCNT1H and TCNT1L – Timer/Counter1 TOGGLE_LED(D2); TCNT1 = 0; // reset timer value, also in register TCNT1 } diff --git a/module01/ex01/main.c b/module01/ex01/main.c index 8fa7bad..4b0669a 100644 --- a/module01/ex01/main.c +++ b/module01/ex01/main.c @@ -1,5 +1,4 @@ #include -#include // #define FIRST_LETTER_IMPL(x) #x[0] // #define FIRST_LETTER(x) FIRST_LETTER_IMPL(x) @@ -26,7 +25,7 @@ #define TURN_OFF_LED(bit) CLEAR(PORTB, bit) #define TOGGLE_LED(led) TOGGLE_PIN(B, led) - +// ELEMENTS #define D1 0 #define D2 1 #define D3 2 @@ -34,19 +33,42 @@ #define SW1 2 #define SW2 4 +// TIME #define PRESCALE_VALUE 1024 -#define TIME(ms) (((F_CPU / PRESCALE_VALUE) * ms) / 1000) +#if (PRESCALE_VALUE == 1) + #define PRESCALE_SET (1 << CS10) +#elif (PRESCALE_VALUE == 8) + #define PRESCALE_SET (1 << CS11) +#elif (PRESCALE_VALUE == 64) + #define PRESCALE_SET (1 << CS10) | (1 << CS11) +#elif (PRESCALE_VALUE == 256) + #define PRESCALE_SET (1 << CS12) +#elif (PRESCALE_VALUE == 1024) + #define PRESCALE_SET (1 << CS10) | (1 << CS12) +#endif +#define TIME_MS(ms) (((F_CPU / PRESCALE_VALUE) * ms) / 1000) int main() { MODE_OUTPUT(B, D2); - TURN_OFF_LED(D2); - TCCR1B |= ((1 << CS10 ) | (1 << CS12 ) ); // set timer with prescale + TCCR1B |= (1 << WGM12); // set timer in CTC (Clear Time on Compare) mode + // -> use bit WGM12 to set mode ctc : Table 16-4. Waveform Generation Mode Bit Description + // -> bit WGM12 is located in register TCCR1B : 16.11.2 TCCR1B Timer/Counter1 Control Register B + + OCR1A = TIME_MS(500); // set CTC compare value + // -> the value to reset the timer is the Output Compare Registers OCR1A : Table 16-4. Waveform Generation Mode Bit Description + + TCCR1B |= (PRESCALE_SET); while(1) { - if ( TCNT1 >= TIME(500)) { - TOGGLE_LED(D2); - TCNT1 = 0; // reset timer value + if (TIFR1 & (1 << OCF1A)) { // when comparison has occured, bit OCF1A is set + // -> "The compare match event will also set the Compare Match Flag (OCF1A/B) which can be used to generate an Output Compare interrupt request" : 16.2.1 Register + // -> bit OCF1A is in register TIFR1 : 16.11.9 TIFR1 – Timer/Counter1 Interrupt Flag Register + + TOGGLE_LED(D2); // toggle using PINx register + + TIFR1 = (1 << OCF1A); // clear the CTC flag + // -> "OCF1A can be cleared by writing a logic one to its bit location" : 16.11.9 TIFR1 – Timer/Counter1 Interrupt Flag Register } } }