42/42_EXT_03_42chips
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mod02 ex03

Browse Source
This commit is contained in:
hugogogo
2025-03-07 17:03:21 +01:00
parent b05b9f0298
commit 652a7913de
3 changed files with 47 additions and 46 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
module02/ex02/main.c
View File

@@ -107,6 +107,7 @@
#define FAST_PWM_TOP_OCR1A_IN_TCCR1A (1<<WGM11 | 1<<WGM10)
#define FAST_PWM_TOP_ICR1_IN_TCCR1B (1<<WGM13 | 1<<WGM12)
#define FAST_PWM_TOP_ICR1_IN_TCCR1A (1<<WGM11 | 0<<WGM10)
// 16.11.8 : Timer/Counter1 Interrupt Mask Register
#define INTERRUPT_ENABLE_CHANNEL_A (1 << OCIE1A)
#define INTERRUPT_DISABLE_CHANNEL_A (0 << OCIE1A)
@@ -136,13 +137,6 @@ char uart_rx(void) {
int main() {
uart_init();
TCCR1A |= CTC_TOP_OCR1A_IN_TCCR1A; // Table 16-4 : set timer in CTC (Clear Time on Compare) mode
TCCR1B |= CTC_TOP_OCR1A_IN_TCCR1B;
OCR1A = TIME_MS(PERIOD); // Table 16-4 : set CTC compare value on channel A, the counter is cleared to zero when the counter value (TCNT1) matches the OCR1A register
TCCR1B |= (PRESCALE_SET(PRESCALE_VALUE)); // 16.4 : set timer according to prescale value, in register TCCR1B, table 16-5 : prescale sets
char received_char;
while(1) {
received_char = uart_rx();