diff --git a/module02/ex00/main.c b/module02/ex00/main.c
index b491739..41948a5 100644
--- a/module02/ex00/main.c
+++ b/module02/ex00/main.c
@@ -64,17 +64,17 @@
 // Table 20-1 : Baud Rate Calculation
 #define USART_BAUDRATE			115200
 #define BAUD_PRESCALER			(DIV_ROUND_CLOSEST(F_CPU, (16 * USART_BAUDRATE)) - 1)
-// Table 20-8 : Mode Selection
+// Table 20-8 : Mode Selection (USART Mode SELect)
 #define ASYNCHRONOUS			(0<<UMSEL01 | 0<<UMSEL00)
 #define SYNCHRONOUS				(0<<UMSEL01 | 1<<UMSEL00)
-// Table 20-9 : Parity Bit Selection
+// Table 20-9 : Parity Bit Selection (USART Parity Mode)
 #define PARITY_DISABLED			(0<<UPM01 | 0<<UPM00)
 #define PARITY_EVEN				(1<<UPM01 | 0<<UPM00)
 #define PARITY_ODD				(1<<UPM01 | 1<<UPM00)
-// Table 20-10 : Stop Bit Selection
+// Table 20-10 : Stop Bit Selection (USART Stop Bit Select)
 #define STOP_ONE_BIT			(0<<USBS0)
 #define STOP_TWO_BIT			(1<<USBS0)
-// Table 20-11 : Data Bit Selection
+// Table 20-11 : Data Bit Selection (USART Character SiZe)
 #define DATA_FIVE_BIT			(0<<UCSZ02 | 0<<UCSZ01 | 0<<UCSZ00)
 #define DATA_SIX_BIT			(0<<UCSZ02 | 0<<UCSZ01 | 1<<UCSZ00)
 #define DATA_SEVEN_BIT			(0<<UCSZ02 | 1<<UCSZ01 | 0<<UCSZ00)
@@ -100,8 +100,8 @@ void uart_init() {
 }
 
 void uart_tx(char c) {
-	while (TEST(UCSR0A, UDRE0) == 0);		// 20.11.2 : do nothing until UDR emission buffer is empty, if UDREn flag is 1, UCSRnA register is empty
-	UDR0 = c;								// 20.11.1 : Put data into buffer, UDRn – USART I/O Data Register (read and write)
+	while (TEST(UCSR0A, UDRE0) == 0);											// 20.11.2 : do nothing until UDR emission buffer is empty, if UDREn flag is 1, UCSRnA register is empty
+	UDR0 = c;																	// 20.11.1 : Put data into buffer, UDRn – USART I/O Data Register (read and write)
 }
 
 int main() {