diff --git a/module05/ex00/adc.c b/module05/ex00/adc.c
index de5d839..d03c95a 100644
--- a/module05/ex00/adc.c
+++ b/module05/ex00/adc.c
@@ -11,11 +11,13 @@
 // - writing a logical one to the ADC Start Conversion bit, ADSC
 
 void adc_init(uint8_t prescaler_value) {
-    ADMUX = (1 << REFS0);								// Table 24-3 : set voltage reference, AVCC with external capacitor at AREF pin
-    ADCSRA = (1 << ADEN); 								// 24.9.2 : enable ADC
-    ADCSRA |= ADC_PRESCALE_SET(prescaler_value);		// Table 24-5 : prescaler ADC
+    ADMUX = (1 << REFS0);									// Table 24-3 : set voltage reference, AVCC with external capacitor at AREF pin
+    ADCSRA = (1 << ADEN); 									// 24.9.2 : enable ADC
+	ADCSRA |= (1 << ADATE); 								// 24.9.2 : enable Auto Trigger -> it will start a conversion on the selected channel in ADMUX when the selected source (in ADCSRB) is triggered
+	ADCSRA |= (1 << ADIE);								 	// 24.9.2 : enable ADC Interrupt
+    ADCSRA |= ADC_PRESCALE_SET(prescaler_value);			// Table 24-5 : prescaler ADC
 
-	ADCSRB = ADC_TRIGGER_TIMER_1_COMPARE_B;					// Table 24-6 : ADC Auto Trigger Source
+	ADCSRB = ADC_TRIGGER_TIMER_1_OVERFLOW;					// Table 24-6 : ADC Auto Trigger Source
 	ADMUX = (ADMUX & 0b11110000) | (adc_channel & 0b1111);	// Table 24-4 : Select ADC channel 0, (Table 14-6 : alternate function for RV1 on PC0 -> ADC0)
 }
 
diff --git a/module05/ex00/timer.c b/module05/ex00/timer.c
index f925572..27eca83 100644
--- a/module05/ex00/timer.c
+++ b/module05/ex00/timer.c
@@ -3,10 +3,15 @@
 // Set up Timer1 in CTC mode to trigger every 20ms
 // With 16MHz clock and prescaler of 8, and OCR1A = 39999:
 // 16MHz/8/40000 = 50Hz = 20ms period
+#define T1B_PRESCALE_VALUE					64
 void timer_1B_init() {
-	TCCR1A = 0; // Normal operation, OC1A/OC1B disconnected
-	TCCR1B = (1 << WGM12) | (1 << CS11); // CTC mode, prescaler = 8
-	OCR1A = 39999; // Compare match value for 20ms
+	TCCR1A = 0;											// 16.11.1 : Normal operation, OC1A/OC1B disconnected
+	TCCR1B = (1 << WGM12);								// 16.11.2 : CTC mode
+	TCCR1B |= T1_PRESCALE_SET(T1B_PRESCALE_VALUE);		// 16.11.2 : prescaler = 8
+	OCR1A = TIME_MS(20, T1B_PRESCALE_VALUE);			// 16.11.5 : Compare match value for register A
+	OCR1B = TIME_MS(20, T1B_PRESCALE_VALUE) - 1000;		// 16.11.6 : Compare match value for register B
 
-	TIMSK1 = (1 << OCIE1B); // Enable Timer1 Compare B Match Interrupt
+	// TIMSK1 = (1 << OCIE1B);								// Enable Timer1 Compare B Match Interrupt
+
+	// ADCSRA |= (1 << ADSC);							// 24.9.2 : start first conversion
 }
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