From 10480f63d70f4a8af1f11d009ec1fcc7adbc010a Mon Sep 17 00:00:00 2001
From: hugo LAMY <hugo.lamy@oskey.io>
Date: Fri, 7 Mar 2025 09:09:16 +0100
Subject: [PATCH] wip ex01

---
 module02/ex01/main.c | 43 ++++++++++++++++++++++++++++++++++---------
 1 file changed, 34 insertions(+), 9 deletions(-)

diff --git a/module02/ex01/main.c b/module02/ex01/main.c
index dea9cbb..1fb2b4f 100644
--- a/module02/ex01/main.c
+++ b/module02/ex01/main.c
@@ -2,8 +2,8 @@
 #include <util/delay.h>
 #include <avr/interrupt.h>
 
-// mathematics
-#define DIV_ROUND_CLOSEST(n, d) ((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d)))
+// mathematics 
+#define DIV_ROUND_CLOSEST(n, d)	((((n) < 0) == ((d) < 0)) ? (((n) + (d)/2)/(d)) : (((n) - (d)/2)/(d))) // https://stackoverflow.com/a/18067292
 
 // stringify
 #define STRINGIFY_HELPER(x)		#x
@@ -86,10 +86,20 @@
 #define TRANSMITTER_DISABLED	(0<<TXEN0)
 #define TRANSMITTER_ENABLED		(1<<TXEN0)
 
+// TIMER
+#define PERIOD					2000
+// Table 16-4 : Waveform Generation Mode Bit Description
+#define CTC_TOP_OCR1A_IN_TCCR1B			(0<<WGM13 | 1<<WGM12)
+#define CTC_TOP_OCR1A_IN_TCCR1A									(0<<WGM11 | 0<<WGM10)
+#define CTC_TOP_ICR1_IN_TCCR1B			(1<<WGM13 | 1<<WGM12)
+#define CTC_TOP_ICR1_IN_TCCR1A									(0<<WGM11 | 0<<WGM10)
+#define FAST_PWM_TOP_OCR1A_IN_TCCR1B	(1<<WGM13 | 1<<WGM12)
+#define FAST_PWM_TOP_OCR1A_IN_TCCR1A							(1<<WGM11 | 1<<WGM10)
+#define FAST_PWM_TOP_ICR1_IN_TCCR1B		(1<<WGM13 | 1<<WGM12)
+#define FAST_PWM_TOP_ICR1_IN_TCCR1A								(1<<WGM11 | 0<<WGM10)
+
 // END MACROS
 
-// 20.4 Frame Formats : 8N1 : 8 data bits, no parity, 1 stop bit
-// 20.5 USART Initialization : (1) setting baud rate, (2) setting frame format, (3) enabling the Transmitter or the Receiver
 void uart_init() {
 	UBRR0H = (unsigned char) (BAUD_PRESCALER >> 8);								// 20.11.5 : UBRRnL and UBRRnH – USART Baud Rate Registers
 	UBRR0L = (unsigned char) BAUD_PRESCALER;
@@ -104,10 +114,25 @@ void uart_tx(char c) {
 	UDR0 = (unsigned char) c;													// 20.11.1 : Put data into buffer, UDRn – USART I/O Data Register (read and write)
 }
 
-int main() {
-	uart_init();
-	while (1) {
-		uart_tx('Z');
-		_delay_ms(1000);
+void uart_printstr(const char* str) {
+	while (*str) {
+		uart_tx(*str);
+		str++;
 	}
 }
+
+// print hello world, on serial port, every 2 seconds, with empty infinite loop
+int main() {
+	uart_init();
+
+	TCCR1A |= CTC_TOP_OCR1A_IN_TCCR1A;		// Table 16-4 : set timer in CTC (Clear Time on Compare) mode
+	TCCR1B |= CTC_TOP_OCR1A_IN_TCCR1B;
+
+	TCCR1A |= (1 << COM1A0);				// 14.3.1 : set Compare Output with COM1A0, it toggles OC1A on compare match (Table 16-1), OC1A is alternate function for PORTB1 (Table 14-3)
+
+	OCR1A = TIME_MS(PERIOD);				// Table 16-4 : set CTC compare value, the counter is cleared to zero when the counter value (TCNT1) matches the OCR1A register
+
+	TCCR1B |= (PRESCALE_SET);
+
+	while(1);
+}