diff --git a/README.md b/README.md
index 44ba6f5..98d53c1 100644
--- a/README.md
+++ b/README.md
@@ -86,3 +86,7 @@ avrdude done.  Thank you.
 
 - `brew tap osx-cross/avr`
 - `brew install avr-gcc avrdude`
+
+## screen
+
+- `screen /dev/ttyUSB0 115200`
diff --git a/module01/ex00/main.c b/module01/ex00/main.c
index c29a1f6..965f86a 100644
--- a/module01/ex00/main.c
+++ b/module01/ex00/main.c
@@ -51,17 +51,13 @@
 // TIME
 #define PRESCALE_VALUE				1024		// can be 1, 8, 64, 256, 1024
 // table 16-5 : prescale sets
-#if (PRESCALE_VALUE == 1)
-	#define PRESCALE_SET			(0<<CS12 | 0<<CS11 | 1<<CS10)
-#elif (PRESCALE_VALUE == 8)
-	#define PRESCALE_SET			(0<<CS12 | 1<<CS11 | 0<<CS10)
-#elif (PRESCALE_VALUE == 64)
-	#define PRESCALE_SET			(0<<CS12 | 1<<CS11 | 1<<CS10)
-#elif (PRESCALE_VALUE == 256)
-	#define PRESCALE_SET			(1<<CS12 | 0<<CS11 | 0<<CS10)
-#elif (PRESCALE_VALUE == 1024)
-	#define PRESCALE_SET			(1<<CS12 | 0<<CS11 | 1<<CS10)
-#endif
+#define PRESCALE_SET(value)  \
+									((value) == 1   ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
+									 (value) == 8   ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
+									 (value) == 64  ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
+									 (value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
+									 (value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
+													  (0<<CS12 | 0<<CS11 | 0<<CS10))
 #define TIME_MS(ms)					(((F_CPU / PRESCALE_VALUE) * ms) / 1000)
 
 // END MACROS
@@ -70,12 +66,12 @@ int main() {
 	MODE_OUTPUT(LED2);
 	CLEAR_ELEM(LED2);
 
-	TCCR1B |= (PRESCALE_SET);				// 16.4 : set timer according to prescale value, in register TCCR1B, table 16-5 : prescale sets
+	TCCR1B |= (PRESCALE_SET(PRESCALE_VALUE));	// 16.4 : set timer according to prescale value, in register TCCR1B, table 16-5 : prescale sets
 
 	while(1) {
-		if (TCNT1 >= TIME_MS(500)) {		// 16.11.4 : read timer with register TCNT1 (read/write allowed), that combines two 8 bits registers
+		if (TCNT1 >= TIME_MS(500)) {			// 16.11.4 : read timer with register TCNT1 (read/write allowed), that combines two 8 bits registers
 			TOGGLE_PIN(LED2);
-			TCNT1 = 0;						// reset timer value, also in register TCNT1
+			TCNT1 = 0;							// reset timer value, also in register TCNT1
 		}
 	}
 }
diff --git a/module01/ex01/main.c b/module01/ex01/main.c
index a097c97..969e762 100644
--- a/module01/ex01/main.c
+++ b/module01/ex01/main.c
@@ -51,17 +51,13 @@
 // TIME
 #define PRESCALE_VALUE				1024		// can be 1, 8, 64, 256, 1024
 // table 16-5 : prescale sets
-#if (PRESCALE_VALUE == 1)
-	#define PRESCALE_SET			(0<<CS12 | 0<<CS11 | 1<<CS10)
-#elif (PRESCALE_VALUE == 8)
-	#define PRESCALE_SET			(0<<CS12 | 1<<CS11 | 0<<CS10)
-#elif (PRESCALE_VALUE == 64)
-	#define PRESCALE_SET			(0<<CS12 | 1<<CS11 | 1<<CS10)
-#elif (PRESCALE_VALUE == 256)
-	#define PRESCALE_SET			(1<<CS12 | 0<<CS11 | 0<<CS10)
-#elif (PRESCALE_VALUE == 1024)
-	#define PRESCALE_SET			(1<<CS12 | 0<<CS11 | 1<<CS10)
-#endif
+#define PRESCALE_SET(value)  \
+									((value) == 1   ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
+									 (value) == 8   ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
+									 (value) == 64  ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
+									 (value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
+									 (value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
+													  (0<<CS12 | 0<<CS11 | 0<<CS10))
 #define TIME_MS(ms)					(((F_CPU / PRESCALE_VALUE) * ms) / 1000)
 #define PERIOD						500
 
@@ -77,7 +73,7 @@ int main() {
 
 	OCR1A = TIME_MS(PERIOD);		// Table 16-4 : set CTC compare value, the counter is cleared to zero when the counter value (TCNT1) matches the OCR1A register
 
-	TCCR1B |= (PRESCALE_SET);
+	TCCR1B |= (PRESCALE_SET(PRESCALE_VALUE));
 
 	while(1);
 }
diff --git a/module01/ex02/main.c b/module01/ex02/main.c
index dec2985..50cf69d 100644
--- a/module01/ex02/main.c
+++ b/module01/ex02/main.c
@@ -51,17 +51,13 @@
 // TIME
 #define PRESCALE_VALUE				1024		// can be 1, 8, 64, 256, 1024
 // table 16-5 : prescale sets
-#if (PRESCALE_VALUE == 1)
-	#define PRESCALE_SET			(0<<CS12 | 0<<CS11 | 1<<CS10)
-#elif (PRESCALE_VALUE == 8)
-	#define PRESCALE_SET			(0<<CS12 | 1<<CS11 | 0<<CS10)
-#elif (PRESCALE_VALUE == 64)
-	#define PRESCALE_SET			(0<<CS12 | 1<<CS11 | 1<<CS10)
-#elif (PRESCALE_VALUE == 256)
-	#define PRESCALE_SET			(1<<CS12 | 0<<CS11 | 0<<CS10)
-#elif (PRESCALE_VALUE == 1024)
-	#define PRESCALE_SET			(1<<CS12 | 0<<CS11 | 1<<CS10)
-#endif
+#define PRESCALE_SET(value)  \
+									((value) == 1   ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
+									 (value) == 8   ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
+									 (value) == 64  ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
+									 (value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
+									 (value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
+													  (0<<CS12 | 0<<CS11 | 0<<CS10))
 #define TIME_MS(ms)					(((F_CPU / PRESCALE_VALUE) * ms) / 1000)
 #define PERIOD						1000
 #define DUTY_CYCLE					10
@@ -83,7 +79,7 @@ int main() {
     
     OCR1A = TIME_MS(PERCENT(DUTY_CYCLE, PERIOD));	// 16.9.3 : set the duty cycle to DUTY_CYCLE% of the time -> OC1A (alternate function of PORTB1, aka LED2) is cleared when TCNT1 (the counter value) equals OCR1A
 
-    TCCR1B |= (PRESCALE_SET);						// start the timer with the prescaler
+    TCCR1B |= (PRESCALE_SET(PRESCALE_VALUE));						// start the timer with the prescaler
 
 	while(1) {
 		continue;
diff --git a/module01/ex03/main.c b/module01/ex03/main.c
index f566966..042de93 100644
--- a/module01/ex03/main.c
+++ b/module01/ex03/main.c
@@ -52,17 +52,13 @@
 // TIME
 #define PRESCALE_VALUE				1024		// can be 1, 8, 64, 256, 1024
 // table 16-5 : prescale sets
-#if (PRESCALE_VALUE == 1)
-	#define PRESCALE_SET			(0<<CS12 | 0<<CS11 | 1<<CS10)
-#elif (PRESCALE_VALUE == 8)
-	#define PRESCALE_SET			(0<<CS12 | 1<<CS11 | 0<<CS10)
-#elif (PRESCALE_VALUE == 64)
-	#define PRESCALE_SET			(0<<CS12 | 1<<CS11 | 1<<CS10)
-#elif (PRESCALE_VALUE == 256)
-	#define PRESCALE_SET			(1<<CS12 | 0<<CS11 | 0<<CS10)
-#elif (PRESCALE_VALUE == 1024)
-	#define PRESCALE_SET			(1<<CS12 | 0<<CS11 | 1<<CS10)
-#endif
+#define PRESCALE_SET(value)  \
+									((value) == 1   ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
+									 (value) == 8   ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
+									 (value) == 64  ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
+									 (value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
+									 (value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
+													  (0<<CS12 | 0<<CS11 | 0<<CS10))
 #define TIME_MS(ms)					(((F_CPU / PRESCALE_VALUE) * ms) / 1000)
 #define PERIOD						1000
 #define DUTY_CYCLE					10
@@ -129,7 +125,7 @@ int main() {
     
     OCR1A = TIME_MS(PERCENT(DUTY_CYCLE, PERIOD));	// 16.9.3 : set the duty cycle to DUTY_CYCLE% of the time -> OC1A (alternate function of PORTB1, aka LED2) is cleared when TCNT1 (the counter value) equals OCR1A
 
-    TCCR1B |= (PRESCALE_SET);						// start the timer with the prescaler
+    TCCR1B |= (PRESCALE_SET(PRESCALE_VALUE));						// start the timer with the prescaler
 
 	while(1) {
 		on_press(SW1, increment_duty_cycle, &params);
diff --git a/module02/ex01/main.c b/module02/ex01/main.c
index 1fb2b4f..f893ec6 100644
--- a/module02/ex01/main.c
+++ b/module02/ex01/main.c
@@ -87,7 +87,16 @@
 #define TRANSMITTER_ENABLED		(1<<TXEN0)
 
 // TIMER
-#define PERIOD					2000
+#define PERIOD							2000
+#define PRESCALE_VALUE					1024		// can be 1, 8, 64, 256, 1024
+// table 16-5 : prescale sets
+#define PRESCALE_SET(value)  \
+										((value) == 1   ? (0<<CS12 | 0<<CS11 | 1<<CS10) : \
+										 (value) == 8   ? (0<<CS12 | 1<<CS11 | 0<<CS10) : \
+										 (value) == 64  ? (0<<CS12 | 1<<CS11 | 1<<CS10) : \
+										 (value) == 256 ? (1<<CS12 | 0<<CS11 | 0<<CS10) : \
+										 (value) == 1024? (1<<CS12 | 0<<CS11 | 1<<CS10) : \
+														  (0<<CS12 | 0<<CS11 | 0<<CS10))
 // Table 16-4 : Waveform Generation Mode Bit Description
 #define CTC_TOP_OCR1A_IN_TCCR1B			(0<<WGM13 | 1<<WGM12)
 #define CTC_TOP_OCR1A_IN_TCCR1A									(0<<WGM11 | 0<<WGM10)
@@ -104,9 +113,9 @@ void uart_init() {
 	UBRR0H = (unsigned char) (BAUD_PRESCALER >> 8);								// 20.11.5 : UBRRnL and UBRRnH – USART Baud Rate Registers
 	UBRR0L = (unsigned char) BAUD_PRESCALER;
 
-	UCSR0C = ASYNCHRONOUS | PARITY_DISABLED | STOP_ONE_BIT | DATA_EIGHT_BIT;	// 20.11.4 : set Frame Format
+	UCSR0C |= ASYNCHRONOUS | PARITY_DISABLED | STOP_ONE_BIT | DATA_EIGHT_BIT;	// 20.11.4 : set Frame Format
 	
-	UCSR0B = RECEIVER_DISABLED | TRANSMITTER_ENABLED;							// 20.11.3 : enable Receiver and/or Transmitter
+	UCSR0B |= RECEIVER_DISABLED | TRANSMITTER_ENABLED;							// 20.11.3 : enable Receiver and/or Transmitter
 }
 
 void uart_tx(char c) {
@@ -125,14 +134,12 @@ void uart_printstr(const char* str) {
 int main() {
 	uart_init();
 
-	TCCR1A |= CTC_TOP_OCR1A_IN_TCCR1A;		// Table 16-4 : set timer in CTC (Clear Time on Compare) mode
+	TCCR1A |= CTC_TOP_OCR1A_IN_TCCR1A;				// Table 16-4 : set timer in CTC (Clear Time on Compare) mode
 	TCCR1B |= CTC_TOP_OCR1A_IN_TCCR1B;
 
-	TCCR1A |= (1 << COM1A0);				// 14.3.1 : set Compare Output with COM1A0, it toggles OC1A on compare match (Table 16-1), OC1A is alternate function for PORTB1 (Table 14-3)
+	OCR1A = TIME_MS(PERIOD);						// Table 16-4 : set CTC compare value, the counter is cleared to zero when the counter value (TCNT1) matches the OCR1A register
 
-	OCR1A = TIME_MS(PERIOD);				// Table 16-4 : set CTC compare value, the counter is cleared to zero when the counter value (TCNT1) matches the OCR1A register
-
-	TCCR1B |= (PRESCALE_SET);
+	TCCR1B |= (PRESCALE_SET(PRESCALE_VALUE));		// 16.4 : set timer according to prescale value, in register TCCR1B, table 16-5 : prescale sets
 
 	while(1);
 }