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m05e00 done

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hugogogo
2025-03-13 18:42:34 +01:00
parent 7ca02352d9
commit 00bcdb1a79
4 changed files with 18 additions and 15 deletions
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18
module05/ex00/adc.c
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@@ -10,18 +10,16 @@
// - disabling the Power Reduction ADC bit, PRADC
// - writing a logical one to the ADC Start Conversion bit, ADSC
#define ADC_PRESCALER 8
void adc_init() {
ADMUX = (1 << REFS0); // Table 24-3 : set voltage reference, AVCC with external capacitor at AREF pin
ADCSRA = (1 << ADEN) // 24.9.2 : enable ADC
| ADC_PRESCALE_SET(ADC_PRESCALER); // Table 24-5 : prescaler ADC
void adc_init(uint8_t prescaler_value) {
ADMUX = (1 << REFS0); // Table 24-3 : set voltage reference, AVCC with external capacitor at AREF pin
ADCSRA = (1 << ADEN); // 24.9.2 : enable ADC
ADCSRA |= ADC_PRESCALE_SET(prescaler_value); // Table 24-5 : prescaler ADC
}
uint16_t adc_read(uint8_t channel) {
CLEAR(PRR, PRADC); // 24.3 : ensure power reduction is disabled for ADC, (10.11.3 : PRR – Power Reduction Register)
ADMUX = (ADMUX & 0xF0) | (channel & 0x0F); // Select ADC channel
ADCSRA |= (1 << ADSC); // 24.9.2 : Start conversion, ADSC: ADC Start Conversion
while (ADCSRA & (1 << ADSC)); // Wait for completion
CLEAR(PRR, PRADC); // 24.3 : ensure power reduction is disabled for ADC, (10.11.3 : PRR – Power Reduction Register)
ADMUX = (ADMUX & 0b11110000) | (channel & 0b1111); // Table 24-4 : Select ADC channel, (Table 14-6 : alternate function for RV1 on PC0 -> ADC0)
ADCSRA |= (1 << ADSC); // 24.9.2 : Start conversion, ADSC: ADC Start Conversion
while (ADCSRA & (1 << ADSC)); // Wait for completion
return ADC;
}